IEEE International Conference on Microelectronic Test Structures
ICMTS Best Papers
| 2024 | 6.1 | Efficient Characterization Methodology for Low-Frequency Noise Monitoring L. Pirro, T. Chohan, P. Liebscher, M. Juettner, F. Holzmueller, R. Jain, Y. Raffel1, K. Seidel1, R. Olivo1, A. Zaka, J. Hoentschel GlobalFoundries, Dresden, Germany 1Fraunhofer-IPMS, Dresden, Germany HOVER FOR ABSTRACT | |
| 2023 | 5.1 | Measurement of Temperature Effect on Comparator Offset Voltage Variation Y. Iwata, T. Kitamura, M. Islam Department of Electrical Engineering, Graduate School of Engineering, Kyoto University Kyoto Daigaku Katsura, Nishikyo-ku, Kyoto, JAPAN DOI: 10.1109/ICMTS55420.2023.10094194 HOVER FOR ABSTRACT | PDF Xplore |
| 2023 | 4.1 | The Pressing Probe Needle Technique for Characterizing Mechanical Stress Sensitivity of Semiconductor Devices H. Tuinhout, O. Dieball NXP Semiconductors, Eindhoven, The Netherlands DOI: 10.1109/ICMTS55420.2023.10094063 HOVER FOR ABSTRACT | PDF Xplore |
| 2022 | 5.1 | Embedded measurement of the SET switching time of RRAM memory cells F. Jebali, E. Muhr, M. Alayan, M. C. Faye, D. Querlioz1, F. Andrieu2, E. Vianello2, G. Molas2, M. Bocquet, J. M. Portal Aix-Marseille Univ., Marseille, France 1Université Paris-Saclay, 91120 Palaiseau, France 2CEA, LETI, Grenoble, France DOI: 10.1109/ICMTS50340.2022.9898162 HOVER FOR ABSTRACT | PDF Xplore |
| 2020 | 8.3 | Integrated Variability Measurements of 28 nm FDSOI MOSFETs down to 4.2 K for Cryogenic CMOS Applications B. C. Paz, L. L. Guevel, M. Cassé, G. Billiot, G. Pillonnet, A. Jansen1, S. Haendler2, A. Juge2, E. Vincent2, P. Galy2, G. Ghibaudo, M. Vinet, S. d. Franceschi1, T. Meunier, F. Gaillard MINATEC Campus, CEA-Leti, Université Grenoble Alpes, Grenoble, France 1CEA-IRIG, Université Grenoble Alpes, Grenoble, France 2STMicroelectronics, Crolles, France DOI: 10.1109/ICMTS48187.2020.9107906 HOVER FOR ABSTRACT | PDF Xplore |
| 2019 | 2.1 | Extracting BTI-induced Degradation without Temporal Factors by Using BTI-Sensitive and BTI-Insensitive ring Oscillators R. Kishida, T. Asuke1, J. Furuta1, K. Kobayashil1 Department of Electrical Engineering, Tokyo University of Science, Noda, Chiba, Japan 1Department of Electronics, Kyoto Institute of Technology, Japan DOI: 10.1109/ICMTS.2019.8730967 HOVER FOR ABSTRACT | PDF Xplore |
| 2018 | 5.1 | A test structure to reveal short-range correlation effects of mismatch fluctuations in backend metal fringe capacitors H. Tuinhout, A. Z. -v. Duijnhoven1, I. Brunets NXP Semiconductors, AE Eindhoven, The Netherlands 1NXP Semiconductors, High Tech Campus 46, 5656 AE Eindhoven, The Netherlands DOI: 10.1109/ICMTS.2018.8383771 HOVER FOR ABSTRACT | PDF Xplore |
| 2018 | 1.1 | Test structures for debugging variation of critical devices caused by layout-dependent effects in FinFETs Q. Lin, H. Pan, J. Chang Xilinx Inc., San Jose, CA DOI: 10.1109/ICMTS.2018.8383751 HOVER FOR ABSTRACT | PDF Xplore |
| 2017 | 8.1 | A statistical modeling methodology of RTN gate size dependency based on skewed ring oscillators A. K. M. M. Islam, T. Nakai1, H. Onodera1 Institute of Industrial Science, The University of Tokyo, Tokyo, JAPAN 1Graduate School of Informatics, Kyoto University, Kyoto, JAPAN DOI: 10.1109/ICMTS.2017.7954282 HOVER FOR ABSTRACT | PDF Xplore |
| 2016 | 4.2 | Test structures for CMOS RF reliability assessment L. Heiß, A. Lachmann1, R. Schwab1, G. Panagopoulos1, P. Baumgartner1, M. Y. Virupakshappaa1, D. Schmitt-Landsiedel2 Technische Universitat Munchen, Munchen, Bayern, DE 1Intel Deutschland GmbH, Neubiberg, Germany 2Technical University of Munich (TUM), Munich, Germany DOI: 10.1109/ICMTS.2016.7476178 HOVER FOR ABSTRACT | PDF Xplore |
| 2015 | 6.1 | Monitoring test structure for plasma process induced charging damage using charge-based capacitance measurement (PID-CBCM) S. Mori, K. Ogawa, H. Oishi, T. Suzuki, M. Tomita, M. Bairo, Y. Fukuzaki, H. Ohnuma Sony Corporation, Kanagawa, Japan DOI: 10.1109/ICMTS.2015.7106123 HOVER FOR ABSTRACT | PDF Xplore |
| 2014 | Circuits to measure the delay variability of MOSFETs K. Balakrishnan, K. Jenkins IBM T.J. Watson Research Center, Yorktown Heights, NY, USA DOI: 10.1109/ICMTS.2014.6841480 HOVER FOR ABSTRACT | PDF Xplore | |
| 2013 | Tr variance evaluation induced by probing pressure and its stress extraction methodology in 28nm High-K and Metal Gate process T. Okagaki, T. Hasegawa, H. Takashino, M. Fujii, A. Tsuda, K. Shibutani, Y. Deguchi, M. Yokota, K. Onozawa Renesas Electronics Corporation, Itami, Hyogo, Japan DOI: 10.1109/ICMTS.2013.6528172 HOVER FOR ABSTRACT | PDF Xplore | |
| 2012 | Self-biasing and self-amplifying MOSFET mismatch test structure C. C. McAndrew, M. Zunino, B. Braswell Freescale Semiconductor, Inc., Tempe, AZ, USA DOI: 10.1109/ICMTS.2012.6190651 HOVER FOR ABSTRACT | PDF Xplore | |
| 2011 | An efficient array structure to characterize the impact of through silicon vias on FET devices D. Perry, J. Cho1, S. Domae2, P. Asimakopoulos3, A. Yakovlev3, P. Marchal4, G. Van der Plas4, N. Minas4 Qualcomm, San Diego, CA, USA 1Samsung, IMEC, Belgium 2Panasonic, IMEC, Belgium 3University of Newcastle, UK 4IMEC, Leuven, Belgium DOI: 10.1109/ICMTS.2011.5976872 HOVER FOR ABSTRACT | PDF Xplore | |
| 2010 | Small embedded sensors for accurate temperature measurements in DMOS power transistors M. Pfost, D. Costachescu, A. Podgaynaya1, M. Stecher2, S. Bychikhin2, D. Pogany2, E. Gornik2 Infineon Technologies Romania, IFRO ATV TM, Bucharest, Romania 1Infineon Technologies AG, ATV PTP TSP, Neubiberg, Germany 2Institute of Solid-State Electronics, University of Technology, Vienna, Vienna, Austria DOI: 10.1109/ICMTS.2010.5466872 HOVER FOR ABSTRACT | PDF Xplore | |
| 2009 | Non-Contact, Pad-less Measurement Technology and Test Structures for Characterization of Cross-Wafer and In-Die Product Variability G. Steinbrueck, J. S. Vickers, M. Babazadeh, M. M. Pelella, N. Pakdaman Tau-Metrix, Inc., Santa Clara, CA, USA DOI: 10.1109/ICMTS.2009.4814617 HOVER FOR ABSTRACT | PDF Xplore | |
| 2009 | Four point probe structures with buried electrodes for the electrical characterization of ultrathin conducting films A. W. Groenland, R. A. M. Wolters1, A. Y. Kovalgin, J. Schmitz MESA Institute of Nanotechnology, Semiconductor Components, University of Twente, Enschede, Netherlands 1NXP-TMSC Research Center, Eindhoven, Netherlands DOI: 10.1109/ICMTS.2009.4814639 HOVER FOR ABSTRACT | PDF Xplore | |
| 2008 | High density test structure array for accurate detection and localization of soft fails C. Hess, M. Squcciarini, Shia Yu1, J. Burrows, Jianjun Cheng, R. Lindley1, A. Swimmer1, S. Winters1 PDF Solutions, Inc.orporated, San Diego, CA, USA 1PDF Solutions, Inc.orporated, San Jose, CA, USA DOI: 10.1109/ICMTS.2008.4509327 HOVER FOR ABSTRACT | PDF Xplore | |
| 2007 | A Large Scale, Flip-Flop RAM imitating a logic LSI for fast development of process technology M. Fujii, K. Nii, H. Makino, S. Ohbayashi, M. Igarashi, T. Kawamura, M. Yokota, N. Tsuda, T. Yoshizawa, T. Tsutsui, N. Takeshita, N. Murata, T. Tanaka, T. Fujiwara, K. Asahina, M. Okada, K. Tomita, M. Takeuchi, H. Shinohara Renesas Technology Corporation, Itami, Hyogo, Japan DOI: 10.1109/ICMTS.2007.374469 HOVER FOR ABSTRACT | PDF Xplore | |
| 2006 | Ring oscillator based technique for measuring variability statistics M. Bhushan, M. B. Ketchen1, S. Polonsky1, A. Gattiker2 IBM Systems and Technology Group, Poughkeepsie, NY, USA 1IBM Thomson J.Watson Research Center, Yorktown Heights, NY, USA 2IBM Research, Austin, TX, USA DOI: 10.1109/ICMTS.2006.1614281 HOVER FOR ABSTRACT | PDF Xplore | |
| 2005 | High speed test structures for in-line process monitoring and model calibration [CMOS applications] M. Ketchen, M. Bhushan1, D. Pearson IBM Research Center, Yorktown Heights, NY, USA 1IBM S and TG, Yorktown Heights, NY, USA DOI: 10.1109/ICMTS.2005.1452212 HOVER FOR ABSTRACT | PDF Xplore | |
| 2004 | Test chip for the development and evaluation of test structures for measuring stress in metal interconnect J. G. Terry, S. Smith, A. J. Walton, A. M. Gundlach, J. T. M. Stevenson, A. B. Horsfall1, K. Wang1, J. M. M. dos Santos1, S. M. Soare2, N. G. Wright1, A. G. O'Neill1, S. J. Bull2 Institute for Integrated Micro and Nano Systems, Scottish Microelectronics Centre, University of Edinburgh, Edinburgh, UK 1School of Electrical, Electronic and Computer Engineering, University of Newcastle, Newcastle, UK 2School of Chemical Engineering and Advanced Materials, University of Newcastle, Newcastle, UK DOI: 10.1109/ICMTS.2004.1309304 HOVER FOR ABSTRACT | PDF Xplore | |
| 2003 | An integrated test chip for the complete characterization and monitoring of a 0.25µm CMOS technology that fits into five scribe line structures 150µm by 5000µm R. Lefferts, C. Jakubiec Accelerant Networks, Inc., Beaverton, OR, USA DOI: 10.1109/ICMTS.2003.1197382 HOVER FOR ABSTRACT | PDF Xplore | |
| 2002 | Design and characterisation of a high precision resistor ladder test structure H. P. Tuinhout, G. Hoogzaad1, M. Vertregt, R. L. J. Roovers, C. Erdmann2 Prof. Holstlaan 4 (WAY41), Philips Research, Eindhoven, Netherlands 1Philips Semiconductors, Delft, Netherlands 2Philips Semiconductors, Caen, France DOI: 10.1109/ICMTS.2002.1193200 HOVER FOR ABSTRACT | PDF Xplore | |
| 2001 | A new test structure to measure precise location of hot-carrier-induced photoemission peak from gate center of subquarter-micron n-MOSFETs M. Funada, T. Matsuda, T. Ohzone, S. Odanaka1, K. Yamashita2, N. Koike2, K. Tatsumma3 Department of Electronics and Informatics, Toyama Prefectural University, Imizu-gun, Toyama, Japan 1Cybermedia Center, Osaka University, Toyonaka, Osaka, Japan 2ULSI Process Technology Development Center, Matsushita Electronics Corp., Minami-ku, Kyoto, Japan 3NA DOI: 10.1109/ICMTS.2001.928666 HOVER FOR ABSTRACT | PDF Xplore | |
| 2000 | Characterisation of systematic MOSFET transconductance mismatch H. Tuinhout Philips Res., Eindhoven, Netherlands DOI: 10.1109/ICMTS.2000.844419 HOVER FOR ABSTRACT | PDF Xplore | |
| 2000 | A novel approach for precise characterization of long distance mismatch of CMOS-devices U. Schaper, C. Linnenbank, R. Thewes1 Infineon Technologies AG, Corporate Frontends CFE SIM 1Corporate Research CPR 7, Munich, Germany DOI: 10.1109/ICMTS.2000.844422 HOVER FOR ABSTRACT | PDF Xplore | |
| 1999 | A thermal van der Pauw test structure O. Paul, L. Plattner1, H. Baltes1 Institute for Microsystem Technology, University of Freiburg, Freiburg im Breisgau, Germany 1Physical Electronics Laboratory, ETH Hoenggerberg HPT, Zurich, Switzerland DOI: 10.1109/ICMTS.1999.766216 HOVER FOR ABSTRACT | PDF Xplore | |
| 1998 | Detailed observation of small leak current in flash memories with thin tunnel oxides Y. Manabe, K. Okuyama1, K. Kubota1, A. Nozoe2, T. Karashima1, K. Ujiie3, H. Kanno3, M. Nakashima4, N. Ajika5 Hitachi Ltd, Tokyo, Japan 1Semiconductor & Integrated Circuits Div, Hitachi and Limited, Kodaira, Tokyo, Japan 2Device Development Center, Hitachi and Limited, Tokyo, Japan 3Hitachi ULSI Engineering Corporation, Tokyo, Japan 4Semiconductor Group Manufacturing Technology Div, Mitsubishi Electric Corporation Limited, Hyogo, Japan 5Mitsubishi Electric Corporation, ULSI Laboratory, Hyogo, Japan DOI: 10.1109/ICMTS.1998.688049 HOVER FOR ABSTRACT | PDF Xplore | |
| 1997 | Test structures for investigation of metal coverage effects on MOSFET matching H. P. Tuinhout, M. Vertregt1 Philips Res. Lab., Eindhoven, Netherlands 1Philips Research, Eindhoven, Netherlands DOI: 10.1109/ICMTS.1997.589386 HOVER FOR ABSTRACT | PDF Xplore | |
| 1996 | Test structures to measure the Seebeck coefficient of CMOS IC polysilicon M. von Arx, O. Paul, H. Baltes Physical Electronics Laboratory, Zurich, Switzerland DOI: 10.1109/ICMTS.1996.535631 HOVER FOR ABSTRACT | PDF Xplore | |
| 1995 | A new technique for measuring threshold voltage distribution in flash EEPROM devices T. Himeno, N. Matsukawa, H. Hazama, K. Sakui, M. Oshikiri, K. Masuda, K. Kanda, Y. Itoh, J. Miyamoto Semiconductor Device Engineering Laboratory, Toshiba Corporation, Japan DOI: 10.1109/ICMTS.1995.513988 HOVER FOR ABSTRACT | PDF Xplore | |
| 1994 | Self-stressing structures for electromigration testing to 500 MHz E. S. Snyder, D. G. Pierce, D. V. Campbell, S. E. Swanson Sandia National Laboratories, Electronics Quality Reliability Center, Albuquerque, USA DOI: 10.1109/ICMTS.1994.303502 HOVER FOR ABSTRACT | PDF Xplore | |
| 1993 | Modeling and characterization of MOSFET width dependencies R. A. Ashton, P. A. Layman1, C. C. McAndrew1 AT and T Bell Laboratories, Inc., Orlando, FL, USA 1AT and T Bell Laboratories, Inc., Allentown, PA, USA DOI: 10.1109/ICMTS.1993.292881 HOVER FOR ABSTRACT | PDF Xplore | |
| 1992 | New failure analysis technique of ULSIs using photon emission method Y. Uraoka, T. Maeda, I. Miyanaga, K. Tsuji Semiconductor Research Center, Matsushita Elecrric Indusrrial Company Limited, Moriguchi, Osaka, Japan DOI: 10.1109/ICMTS.1992.185947 HOVER FOR ABSTRACT | PDF Xplore | |
| 1992 | Voltage-dividing potentiometer enhancements for high-precision feature placement metrology R. A. Allen, M. W. Cresswell, C. H. Ellenwood, L. W. Linholm National Institute for Standards and Technology, Gaithersburg, MD, USA DOI: 10.1109/ICMTS.1992.185964 HOVER FOR ABSTRACT | PDF Xplore | |
| 1990 | Investigation of self-heating in VLSI and ULSI MOSFETs P. G. Mautry, J. Trager Semiconductor Group, Technology, Siemens AG, Munich, Germany DOI: 10.1109/ICMTS.1990.67907 HOVER FOR ABSTRACT | PDF Xplore | |
| 1990 | On-chip quasi-static floating-gate capacitance measurement method C. Kortekaas Device and Process Characterization Group, Philips Research Laboratories, Eindhoven, Netherlands DOI: 10.1109/ICMTS.1990.67889 HOVER FOR ABSTRACT | PDF Xplore | |
| 1989 | Inverter propagation delay measurements using timing sampler circuits B. R. Blaes, M. G. Buehler Jet Propulsion Laboratory, California Institute of Technology, Pasadena, CA, USA DOI: 10.1109/ICMTS.1989.39314 HOVER FOR ABSTRACT | PDF Xplore |
