IEEE International Conference on Microelectronic Test Structures
ICMTS 1999 Program
1999 Program Booklet
By First Author
| Null holographic test structures for the measurement of overlay and its statistical variation S. A. AbuGhazeleh, P. Christie1, V. Agrawal1, J. T. M. Stevenson2, A. J. Walton2, A. M. Gundlach2, S. Smith2 Dept. of Electr. & Comput. Eng., Delaware Univ., Newark, DE, USA 1Department of Electrical and Computer Engineering, University of Delaware, Newark, DE, USA 2Department of Electrical Engineering, University of Edinburgh, Edinburgh, UK DOI: 10.1109/ICMTS.1999.766235 HOVER FOR ABSTRACT | PDF Xplore | |
| Sheet and line resistance of patterned SOI surface film CD reference materials as a function of substrate bias R. A. Allen, E. M. Vogel, L. W. Linholm, M. W. Cresswell Semiconductor Electronics Division, National Institute for Standards and Technology, Gaithersburg, MD, USA DOI: 10.1109/ICMTS.1999.766215 HOVER FOR ABSTRACT | PDF Xplore | |
| 3D characterization of RF power transistors T. Arnborg, T. Johansson Ericsson Components AB, Kista, Sweden DOI: 10.1109/ICMTS.1999.766230 HOVER FOR ABSTRACT | PDF Xplore | |
| Measurement of N-well sheet resistance under p+ diffusion and p channel gate R. A. Ashton Bell Laboratories, Lucent Technologies, Inc., Orlando, FL, USA DOI: 10.1109/ICMTS.1999.766214 HOVER FOR ABSTRACT | PDF Xplore | |
| A special test structure for the measurement of the injection dependent series resistance of power diodes S. Bellone, S. Daliento1, A. Sanseverino1 DILIE-Department of Electrical Engineering & Computer Science, University of Salerno, Italy 1Department of Electronics and Telecommunications Engineering, University of Napoli Federico II, Italy DOI: 10.1109/ICMTS.1999.766220 HOVER FOR ABSTRACT | PDF Xplore | |
| A simple physical extraction method for RD-RS of asymmetric MOSFETs A. Blaum, J. Victory, C. C. McAndrew1 Advanced Circuit Research Lab-Europe, Motorola, Inc., Geneva, Switzerland 1Modeling Technology Laboratory, Motorola, Inc., Tempe, MD, USA DOI: 10.1109/ICMTS.1999.766232 HOVER FOR ABSTRACT | PDF Xplore | |
| A high density matched hexagonal transistor structure in standard CMOS technology for high speed applications A. Van den Bosch, M. Steyaert1, W. Sansen1 ESAT, Katholieke Univ., Leuven, Heverlee, Belgium 1ESAT-MICAS, Katholieke Universiteit Leuven, Heverlee, Belgium DOI: 10.1109/ICMTS.1999.766245 HOVER FOR ABSTRACT | PDF Xplore | |
| Comparison of micro-electronic test structures for noise measurement verification S. Van den Bosch, W. De Ketalaere1, L. Martens University of Gent, IMEC, Gent, Belgium 1NA DOI: 10.1109/ICMTS.1999.766213 HOVER FOR ABSTRACT | PDF Xplore | |
| Study of low frequency noise in the 0.18 µm silicon CMOS transistors T. Boutchacha, G. Ghibaudo1, B. Belmekki Laboratoire d'Analyse des Composants A Semiconducteurs, Institut d'Electronique, USTO, Algeria 1Laboratoire de Physique des Composants ä¡ Semiconducteurs, URA CNRS, ENSERG INPG, Grenoble, France DOI: 10.1109/ICMTS.1999.766221 HOVER FOR ABSTRACT | PDF Xplore | |
| Contribution to the characterization of the hump effect in MOSFET submicronic technologies H. Brut, R. M. D. A. Velghe1 Crolles Centre Commun, Central R&D-Modeling and Characteaizatioa, STMicroelectronics, Crolles, France 1Crolles Centre Commun, Central R&D-Modeling and Characteaizatioa, Philips Semiconductors, Crolles, France DOI: 10.1109/ICMTS.1999.766241 HOVER FOR ABSTRACT | PDF Xplore | |
| A compact SOI model for fully-depleted and partially-depleted 0.25 µm SIMOX devices Ping Chen, Zhihong Liu, Chune-Sin Yeh, Gang Zhang, K. Nishimura1, M. Shimaya1, T. Komatsu2 BTA Technologies, Inc., Santa Clara, CA, USA 1NTT Systems Electronics Laboratories, Atsugi, Japan 2NTT Advanced Technology Corporation, Musashino, Japan DOI: 10.1109/ICMTS.1999.766248 HOVER FOR ABSTRACT | PDF Xplore | |
| The impact of noise parameter de-embedding on the high-frequency noise modeling of MOSFETs M. J. Deen, Chih-Hung Chen School of Engineering Science, Simon Fraser University, Burnaby, BC, Canada DOI: 10.1109/ICMTS.1999.766212 HOVER FOR ABSTRACT | PDF Xplore | |
| Evaluation of test methods and associated test structures for interconnect reliability control S. Foley, J. Molyneaux1, A. Mathewson National Microelectronics Research Centre, University College-Lee Maltings, Cork, Ireland 1Analog Devices, Raheen Industrial Estate, Limerick, Ireland DOI: 10.1109/ICMTS.1999.766237 HOVER FOR ABSTRACT | PDF Xplore | |
| Improved method for the oxide thickness extraction in MOS structures with ultra-thin gate dielectrics G. Ghibaudo, S. Bruyere1, T. Devoivre2, B. DeSalvo3, E. Vincent2 Phelma, Grenoble, Rhône-Alpes, FR 1NA 2STMicroelectronics, Crolles, France 3URA CNRS ENSERG, Grenoble, France DOI: 10.1109/ICMTS.1999.766226 HOVER FOR ABSTRACT | PDF Xplore | |
| Substrate resistance effect on the Fmax parameter of isolated BJT in BiCMOS process D. Gloria, A. Perrotin, J. L. Carbonero, G. Morin Central R&D, STMicroelectronics, Crolles, France DOI: 10.1109/ICMTS.1999.766210 HOVER FOR ABSTRACT | PDF Xplore | |
| A statistical noise-tolerance analysis and test structure for logic families M. Graziano, G. Masera, G. Piccinini, M. Ruo Roch, M. Zamboni Dip. Elettronica, Politecnico di Torino, Torino, Italy DOI: 10.1109/ICMTS.1999.766218 HOVER FOR ABSTRACT | PDF Xplore | |
| Comparison of sheet-resistance measurements obtained by standard and small-area four-point probing N. M. P. Guillaume, M. W. Cresswell1, R. A. Allen1, S. Everist2, L. W. Linholm1 École Nationale Supérieure d'Electrotechnique, Electronique, Informatique, Toulouse, France 1Semiconductor Electronics Division, National Institute for Standards and Technology, Gaithersburg, MD, USA 2Sandia National Laboratories DOI: 10.1109/ICMTS.1999.766217 HOVER FOR ABSTRACT | PDF Xplore | |
| Implementation of statistical characterisation and design techniques for an industrial 0.5 µm CMOS technology S. Healy, E. Horan, K. McCarthy, A. Mathewson, Zhenqiu Ning1, E. Rombouts, W. Vanderbauwhede, M. Tack National Microelectronics Research Centre, Cork, Ireland 1Alcatel Microelectronics, Oudenaarde, Belgium DOI: 10.1109/ICMTS.1999.766249 HOVER FOR ABSTRACT | PDF Xplore | |
| Stress and recovery transients in bipolar transistors and MOS structures F. Ingvarson, L. . -A. Ragnarsson, P. Lundgren, K. O. Jeppson Department of Microelectronics, Solid State Electronics Laboratory, Chalmers University of Technology, Goteborg, Sweden DOI: 10.1109/ICMTS.1999.766238 HOVER FOR ABSTRACT | PDF Xplore | |
| Direct parameter extraction techniques for a new poly-Si TFT model B. Iniguez, Z. Xu, T. Fjeldly, M. S. Shur Electrical, Computer and System Engineering Department, Rensselaer Polytechnic Institute, Troy, NY, USA DOI: 10.1109/ICMTS.1999.766247 HOVER FOR ABSTRACT | PDF Xplore | |
| Test structure for measurement of ion stopping power H. Kanata, Y. Tosaka, H. Ehara, S. Satoh Fujitsu Laboratories Limited, Atsugi, Japan DOI: 10.1109/ICMTS.1999.766240 HOVER FOR ABSTRACT | PDF Xplore | |
| Automated generation of SPICE characterization test masks and test databases L. Kasel, C. C. McAndrew, P. Drennan, W. F. Davis, R. Ida Motorola, Inc., Tempe, USA DOI: 10.1109/ICMTS.1999.766219 HOVER FOR ABSTRACT | PDF Xplore | |
| On-wafer calibration techniques for giga-hertz CMOS measurements T. E. Kolding RF Integrated Systems & Circuits (RISC) group, University of Aalborg, Aalborg, Denmark DOI: 10.1109/ICMTS.1999.766225 HOVER FOR ABSTRACT | PDF Xplore | |
| Simple technique for the measurement of thermal time constants of microbolometer structures P. Lambkin, N. Folan1, B. Lane National Microelectronics Research Centre, Cork, Ireland 1NA DOI: 10.1109/ICMTS.1999.766239 HOVER FOR ABSTRACT | PDF Xplore | |
| Measurement of VT and Leff using MOSFET gate-substrate capacitance M. M. Lau, C. Y. T. Chiang1, Y. T. Yeow, Z. Q. Yao2 Department of Computer Science and Electrical Engineering, University of Queensland, Brisbane, QLD, Australia 1NA 2Quality Semiconductors Australia, Sydney, Australia DOI: 10.1109/ICMTS.1999.766234 HOVER FOR ABSTRACT | PDF Xplore | |
| A new extraction method for BSIM3v3 model parameters of RF silicon MOSFETs Seonghearn Lee, Hyun Kyu Yu1 Department of Electronic Engineering, Hankuk University of Foreign Studies, Yongin si, South Korea 1Electronics and Telecommunications Research Institute, Micro-Electronics Technology Laboratory, Taejon, South Korea DOI: 10.1109/ICMTS.1999.766223 HOVER FOR ABSTRACT | PDF Xplore | |
| A new procedure for extraction of series resistances for bipolar transistors from DC measurements M. Linder, F. Ingvarson1, K. O. Jeppson1, J. V. Grahn, S. . -L. Zhang, M. Ostling Department of Electronics, Device Technology Laboratory, Royal Institute of Technology, Kista, Sweden 1Department of Microelectronics ED, Solid State Electronics Laboratory, Chalmers University of Technology, Gothenburg, Sweden DOI: 10.1109/ICMTS.1999.766233 HOVER FOR ABSTRACT | PDF Xplore | |
| Inclusion of substrate effects in the flyback method for BJT resistance characterisation D. MacSweeney, K. McCarthy, A. Mathewson, J. A. Power1, S. C. Kelly1 National Microelectronics Research Centre, University College Cork, Ireland 1Analog Devices, Inc., Limerick, Ireland DOI: 10.1109/ICMTS.1999.766242 HOVER FOR ABSTRACT | PDF Xplore | |
| Evolution of the Si-SiO2 interface trap characteristics with Fowler-Nordheim injection Y. Maneglia, D. Bauza UMR CNRS 5531, LPCS, ENSERG/INPG, Grenoble, France DOI: 10.1109/ICMTS.1999.766227 HOVER FOR ABSTRACT | PDF Xplore | |
| Test structure for direct extraction of capacitance matrix in VLSI T. Mido, H. Ito, K. Asada Department of Electronic Engineering, (VLSI Design and Education Center (VDEC)), University of Tokyo, Bunkyo, Tokyo, Japan DOI: 10.1109/ICMTS.1999.766243 HOVER FOR ABSTRACT | PDF Xplore | |
| The fabrication of electrical linewidth structures capable of TEM measurement using standard <100> wafers C. G. Munro, A. M. Gundlach, J. T. M. Stevenson, D. W. Travis, S. Smith, N. S. Rankin, A. J. Walton Edinburgh Microfabrication Facility Department of Electrical Engineering, University of Edinburgh, Edinburgh, UK DOI: 10.1109/ICMTS.1999.766208 HOVER FOR ABSTRACT | PDF Xplore | |
| Identification of MOS oxide defect location with a spatial resolution less than 0.1 µm using photoemission microscope T. Ohzone, M. Yuzaki, T. Matsuda, E. Kameda1 Department of Electronics and Informatics, Toyama Prefectural University, Toyama, Japan 1Department of Electrical Engineering, Toyama National College of Maritime Technology, Toyama, Japan DOI: 10.1109/ICMTS.1999.766222 HOVER FOR ABSTRACT | PDF Xplore | |
| A capacitance-voltage measurement method for DMOS transistor channel length extraction J. Olsson, R. Valtonen, U. Heinle, L. Vestling, A. Soderbarg, H. Norde The Ångström Laboratory, Solid-state Electronics, University of Uppsala, Uppsala, Sweden DOI: 10.1109/ICMTS.1999.766231 HOVER FOR ABSTRACT | PDF Xplore | |
 | A thermal van der Pauw test structure O. Paul, L. Plattner1, H. Baltes1 Institute for Microsystem Technology, University of Freiburg, Freiburg im Breisgau, Germany 1Physical Electronics Laboratory, ETH Hoenggerberg HPT, Zurich, Switzerland DOI: 10.1109/ICMTS.1999.766216 HOVER FOR ABSTRACT | PDF Xplore |
| Test structure design for a fast and simple evaluation of carrier mobilities in highly injected regions G. V. Persiano Facoltà di Ingegneria, Università del Sannio, Benevento, Italy DOI: 10.1109/ICMTS.1999.766224 HOVER FOR ABSTRACT | PDF Xplore | |
| An investigation of on-chip spiral inductors on a 0.6 µm BiCMOS technology for RF applications J. A. Power, S. C. Kelly, E. C. Griffith, M. O'Neill Analog Devices, Raheen Industrial Estate, Limerick, Ireland DOI: 10.1109/ICMTS.1999.766209 HOVER FOR ABSTRACT | PDF Xplore | |
| A new test structure for direct extraction of SPICE model parameters for double polysilicon bipolar transistors M. Sanden, Shi-Li Zhang, J. V. Grahn, M. Ostling Department of Electronics, Kungliga Tekniska Högskolan, Kista, Sweden DOI: 10.1109/ICMTS.1999.766211 HOVER FOR ABSTRACT | PDF Xplore | |
| Geometry modeling method for narrow/short and narrow MOSFETs S. Sekine, M. Sugiyama, N. Saito Computational Technologies Laboratory, Motorola Japan Limited, Sendai, Miyagi, Japan DOI: 10.1109/ICMTS.1999.766229 HOVER FOR ABSTRACT | PDF Xplore | |
| Identification of plasma induced damage conditions in VLSI designs P. Simon, W. Maly1 Philips Semiconductors, Nijmegen, Netherlands 1Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, USA DOI: 10.1109/ICMTS.1999.766206 HOVER FOR ABSTRACT | PDF Xplore | |
| Analysis of current flow in mono-crystalline electrical linewidth structures S. Smith, I. A. B. Lindsay, A. J. Walton, M. W. Cresswell, L. W. Linholm, R. A. Allen, M. Fallon, A. M. Gundlach Department of Electronics and Electrical Engineering, University of Edinburgh, Edinburgh, UK DOI: 10.1109/ICMTS.1999.766207 HOVER FOR ABSTRACT | PDF Xplore | |
| Investigation of optical proximity correction (OPC) and non-uniformities on the performance of resistivity and linewidth measurements S. Smith, A. J. Walton, M. Fallon1 Department of Electronics and Electrical Engineering, University of Edinburgh, Edinburgh, UK 1National Semiconductors (Israel) Limited, Greenock, UK DOI: 10.1109/ICMTS.1999.766236 HOVER FOR ABSTRACT | PDF Xplore | |
| Extraction of the trap density at the gate periphery using the gated diode array for giga-bit DRAMs H. Suzuki, M. Kojima, Y. Nara Fujitsu Laboratories Limited, Atsugi, Japan DOI: 10.1109/ICMTS.1999.766228 HOVER FOR ABSTRACT | PDF Xplore | |
| CMOS 1/f noise modelling and extraction of BSIM3 parameters using a new extraction procedure J. C. Vildeuil, M. Valenza, D. Rigaud Centre dElectronique et de Micro-optoélectronique de Montpellier, Universite Montpellier II, Montpellier, France DOI: 10.1109/ICMTS.1999.766244 HOVER FOR ABSTRACT | PDF Xplore |
