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IEEE International Conference on Microelectronic Test Structures

ICMTS 2012 Program

2012 Program Booklet


By First Author

Characterization and modeling methodology for the evaluation of statistical variation of MOSFETs
L. Bortesi, L. Vendrame, P. Fantini, A. Spessot, A. L. Lacaita1
Research and Development-Technology Development, Micron Technology, Inc., Agrate-Brianza, Italy
1IFN-CNR, Politecnico of Milano, Milano, Italy
DOI: 10.1109/ICMTS.2012.6190653
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The MEMS 5-in-1 Reference Materials (RM 8096 and 8097)
J. Cassard, J. Geist, M. Gaitan, D. G. Seiler
Semiconductor and Dimensional Metrology Division, Physical Measurement Laboratory, National Institute for Standards and Technology, USA
DOI: 10.1109/ICMTS.2012.6190649
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Test structures for interdie variations monitoring in presence of statistical random variability
G. Castaneda, A. Juge1, G. Ghibaudo, D. Golanski1, D. Hoguet2, J. -M. Portal3, B. Borot1
IMEP_LAHC, Minatec, INPG, Grenoble, France
1STMicroelectronics, Crolles, France
2STMicroelectronics, Crolles, FR
3IM2NP IMT Technopole de Château Gombert France, Marseilles, France
DOI: 10.1109/ICMTS.2012.6190609
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Addressable test structures for MOSFET variability analysis
S. Chitrashekaraiah, S. Guo, R. Herberholz, D. Vigar, M. Redford1
CSR Limited, Cambridge, UK
1CSR Technology Inc, 217 Devcon Drive, San Jose, CA, 95112, USA
DOI: 10.1109/ICMTS.2012.6190608
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Impact of mask making imperfections on the performance of matching critical sub-circuit blocks
L. J. Choi, M. Poulter, J. de Santis, G. Cestra, L. Moberly, K. Gadepally, H. McCulloh, R. Beera, V. Garg1, K. Green1, J. Prater
Texas Instruments, Inc., Santa Clara, CA, USA
1Toppan Photomasks, Inc., Round Rock, TX, USA
DOI: 10.1109/ICMTS.2012.6190654
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Piezoresistive membrane deflection test structure for the evaluation of hermeticity in low cavity volume MEMS and microelectronic packages
S. Costello, M. P. Y. Desmulliez, S. McCracken1, C. Lowrie, S. Cargill, A. J. Walton2
MIcroSystems Engineering Centre (MISEC), Institute for Integrated Systems (IIS), School of Engineering and Physical Sciences, Heriot-Watt University, Edinburgh, UK
1Centre House, Midlothian Innovation Centre, MCS Limited, Midlothian, UK
2Scottish Microelectronics Centre, Institute of Integrated Systems (lIS), School of Engineering, University of Edinburgh, Edinburgh, UK
DOI: 10.1109/ICMTS.2012.6190611
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Improved precision methodology for access resistance extraction using Kelvin test structures
A. Cros, G. Morin, G. Castaneda, F. Dieudonné, J. Rosa
TResearch and Development/STD/TPS/ECR, STMicroelectronics, Crolles, France
DOI: 10.1109/ICMTS.2012.6190634
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A novel compact CBCM method for high resolution measurement in 28nm CMOS technology
Kin Hooi Dia, Willy Tsao, Cheng Hsing Chien, Zheng Zeng
MediaTek, Inc., Hsinchu, Taiwan
DOI: 10.1109/ICMTS.2012.6190619
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Experimental extraction of substrate-noise coupling between MOSFETs and its compact modeling for circuit simulation
S. Emoto, T. Miyoshi, M. Miyake, H. J. Mattausch, M. Miura-Mattausch, T. Iizuka1, Y. Sahara1, T. Hoshida1, K. Matsuzawa1, T. Arakawa1
Graduate School of Advanced Science of Matter, Hiroshima University, Higashihiroshima, Japan
1Semiconductor Technology Academic Research Center, Shin-Yokohama, Kanagawa, Japan
DOI: 10.1109/ICMTS.2012.6190628
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Inhomogeneous ring oscillator for WID variability and RTN characterization
S. Fujimoto, I. A. K. M. Mahfzul, T. Matsumoto, H. Onodera1
Graduate School of Informatics, Kyoto University, Japan
1CREST, Japan Science and Technology Agency, Japan
DOI: 10.1109/ICMTS.2012.6190607
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Fast and accurate characterizationst of interconnect capacitance network using Degenerated Exhaustive Direct Charge Measurements (DEDCM)
M. Goto, J. Taniguchi, K. Takano
Agilent Technologies International Japan Limited, Hachioji, Tokyo, Japan
DOI: 10.1109/ICMTS.2012.6190659
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A proposition on test circuit structures using selectively metal-covered transistors for a laser irradiation failure analysis
H. Hatano
Department of Electrical and Electronic Engineering, Faculty of Science and Technology, Shizuoka Institute of Science and Technology, Fukuroi, Shizuoka, Japan
DOI: 10.1109/ICMTS.2012.6190622
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A universal test structure for the direct measurement of the design margin of even-stage ring oscillators with CMOS latch
Y. Hirakawa, A. Motomura, K. Ota, N. Mimura, K. Nakamura
Center for Microelectronic Systems, Kyushu Institute of Technology, Iizuka, Fukuoka, Japan
DOI: 10.1109/ICMTS.2012.6190605
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Compact thermal-interaction model for dynamic within chip temperature determination by circuit simulation
K. Ishiguro, A. Ueno, A. Toda, M. Miyake, H. J. Mattausch, M. Miura-Mattausch, K. Matsuzawa1, T. Iizuka1, S. Yamaguchi1, T. Hoshida1, A. Kinoshita1, T. Arakawa1
Graduate School of Advanced Science of Matter, Hiroshima University, Higashihiroshima, Japan
1Semiconductor Technology Academic Research Center, Kanagawa, Japan
DOI: 10.1109/ICMTS.2012.6190643
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A diaphragm based piezoelectric AlN film quality test structure
N. Jackson, R. O'Keeffe, R. O'Leary1, M. O'Neill2, F. Waldron, A. Mathewson
Tyndall National Institute, University College Cork, Cork, Ireland
1University College Cork National University of Ireland, Cork, IE
2Analog Devices Inc., Limerick, Ireland
DOI: 10.1109/ICMTS.2012.6190612
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Active “multi-fingers”: Test structure to improve MOSFET matching in sub-threshold area
Y. Joly, L. Lopez1, J. . -M. Portal, H. Aziza, Y. Bert2, F. Julien2, P. Fornara2
IM2NP Laboratory (UMR CNRS 6242), Marseille, France
1S TMicroelectronics, Rousset, France
2STMicroelectronics, Rousset, France
DOI: 10.1109/ICMTS.2012.6190652
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Nano CV probe characterization analysis comparison with conventional CV probe pad analysis
T. Kane, M. P. Tenney
IBM Systems and Technology Group, Hopewell Junction, NY, USA
DOI: 10.1109/ICMTS.2012.6190657
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32nm yield learning using addressable defect arrays
M. Karthikeyan, J. Cassels, L. Arie
IBM Systems and Technology Group, Hopewell Junction, NY, USA
DOI: 10.1109/ICMTS.2012.6190620
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Self-heating parameter extraction of power MOSFETs based on transient drain current measurements and on the 2-cell self-heating model
R. Koh, T. Iizuka
Technology Development Unit, RENESAS Electronics, Kawasaki, Kanagawa, Japan
DOI: 10.1109/ICMTS.2012.6190644
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Calibration of library element optimization to improve static power
V. Kolagunta, S. Sundareswaran1, P. Sharma1, D. Hall1, M. A. Thompson2, B. Smith1, S. Veeraraghavan1
Global Foundries, Inc., Malta, NY, USA
1Freescale Semiconductor, Inc., Austin, TX, USA
2Austin, TX, USA
DOI: 10.1109/ICMTS.2012.6190603
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Simple gate charge (Qg) measurement technique for on-wafer statistical monitoring and modeling of power semiconductor devices
V. Krishnamurthy, A. Gyure, P. Francis
Texas Instruments, Inc., Santa Clara, CA, USA
DOI: 10.1109/ICMTS.2012.6190627
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A test circuit for extremely low gate leakage current measurement of 10 aA for 80,000 MOSFETs in 80 s
Y. Kumagai, T. Inatsuka1, R. Kuroda, A. Teramoto2, T. Suwa2, S. Sugawa2, T. Ohmi2
Graduate School of Engineering, Tohoku University, Aoba-ku, Japan
1Graduate School of Engineering, Tohoku University
2New Industry Creation Hatchery Center, Tohoku University, Sendai, Japan
DOI: 10.1109/ICMTS.2012.6190631
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Dynamic pixel test pattern for CMOS image sensor
K. Lee, H. Lee, M. Jang, J. Kim, S. Kim, J. Moon, I. Cho, K. Yoo
Hynix Semiconductor Inc., Kyoungi-Do, Korea
DOI: 10.1109/ICMTS.2012.6190617
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An extended de-embedding method for on-wafer components
Yu-Ling Lin, Hsiao-Tsung Yen, Ho-Hsiang Chen, Chewn-Pu Jou, Chin-Wei Kuo, Min-Che Jeng, Fu-Lung Hsuch, Chih-Hua Hsiao1, Guo-Wei Huang1
Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan
1National Nano Device Laboratories, Hsinchu, Taiwan
DOI: 10.1109/ICMTS.2012.6190638
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In-situ calibration and verification techniques for the characterization of microwave circuits and devices
I. Martinez
Centellax, Inc., Santa Rosa, CA, USA
DOI: 10.1109/ICMTS.2012.6190637
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Reliability analysis of NAND gates with modified channel length in series n-MOSFETs
T. Matsuda, Y. Tokumitsu, H. Hanai, H. Iwata, T. Ohzone1
Department ofInformation Systems Engineering, Toyama Prefectural University, Japan
1Dawn Enterprise, Nagoya, Japan
DOI: 10.1109/ICMTS.2012.6190625
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Self-biasing and self-amplifying MOSFET mismatch test structure
C. C. McAndrew, M. Zunino, B. Braswell
Freescale Semiconductor, Inc., Tempe, AZ, USA
DOI: 10.1109/ICMTS.2012.6190651
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Evaluation of dynamic bonding stress and interlayer cracking using a combo sensor
Y. Miki, H. Watanabe
Corporate Technology Development Group, Ricoh Company Limited, Ikeda, Osaka, Japan
DOI: 10.1109/ICMTS.2012.6190647
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A blur-range test structure of collimation-controller-integrated silicon shadow mask for three-dimensional surface patterning with sputtering
S. Morishita, M. Kubota, Y. Mita
Department of Electrical Engineering and Information Systems, University of Tokyo, Tokyo, Japan
DOI: 10.1109/ICMTS.2012.6190615
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Correlation of optical and electrical test structures for characterisation of copper self-annealing
J. Murray, S. Smith1, G. Schiavone1, J. G. Terry1, A. R. Mount2, A. J. Walton1
School of Chemistry, University of Edinburgh, UK
1Institute for Integrated Micro and Nano Systems (Joint Research Institute for Integrated Systems), School of Engineering, Scottish Microelectronics Centre, University of Edinburgh, Edinburgh, UK
2The University of Edinburgh, Edinburgh, Edinburgh, GB
DOI: 10.1109/ICMTS.2012.6190635
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Ring oscillator with calibration circuit for accurate on-chip IR-drop measurement
S. Nishizawa, H. Onodera1
Graduate School of Informatics,Kyoto University, Sakyo-ku, Kyoto, JAPAN
1JST-CREST, Japan
DOI: 10.1109/ICMTS.2012.6190602
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Development of a novel system for characterizing MOSFET noise in higher frequency regimes
K. Ohmori, R. Hasunuma, K. Yamada
JST-CREST, Japan
DOI: 10.1109/ICMTS.2012.6190639
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A novel structure of MOSFET array to measure off-leakage current with high accuracy
H. Oishi, T. Suzuki, M. Bairo, S. Mori, K. Ogawa, H. Ohnuma
Semiconductor Technology Development Division, Core Device Development Group, Research and Development Platform, Sony Corporation, Atsugi, Kanagawa, Japan
DOI: 10.1109/ICMTS.2012.6190604
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A novel high accurate analytical technique of the leak current for the product chip
T. Okagaki, N. Takeshita, S. Tanaka, S. Tateishi, K. Shibutani, T. Tsutsui, H. Abe, M. Yokota, K. Onozawa
Renesas Electronics Corporation, Hyogo, Japan
DOI: 10.1109/ICMTS.2012.6190626
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Electrical characterisation of dry microneedle electrodes for portable bio-potential recording applications
F. Pini, C. O'Mahony1, K. G. McCarthy
Dept. of Electrical and Electronic Engineering, University College Cork, Cork, Ireland
1Tyndall National Institute, University College Cork, Cork, Ireland
DOI: 10.1109/ICMTS.2012.6190624
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Combined C-V/I-V front-end-of-line measurement
S. Polonsky, S. Realov1, J. -H. Liao2, M. Hargrove3, M. Ketchen
IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA
1Department of Electrical Engineering, Columbia University, New York, NY, USA
2Systems and Technology Group, IBM, Hopewell Junction, NY, USA
3GLOBALFOUNDRIES, Hopewell Junction, NY, USA
DOI: 10.1109/ICMTS.2012.6190656
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Quantitative wafer mapping of residual stress in electroplated NiFe films using independent strain and Young's modulus measurements
G. Schiavone, M. P. Y. Desmulliez1, S. Smith, J. Murray2, E. Sirotkin, J. G. Terry, A. R. Mount3, A. J. Walton
Institute for Integrated Micro and Nano Systems, Joint Research Institute for Integrated Systems, School of Engineering, Scottish Microelectronics Centre, The University of Edinburgh, Edinburgh, UK
1MIcro Systems Engineering Centre, joint Research Institute for Integrated Systems, School of Engineering & Physical Sciences, Heriot-Watt University, Edinburgh, UK
2School of Chemistrv, Joseph Black Building, The University of Edinburgh, UK
3School of Chemistrv, Joseph Black Building, The University of Edinburgh, Edinburgh, UK
DOI: 10.1109/ICMTS.2012.6190629
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Simultaneous characterization of mechanical and electrical performances of ultraflexible and stretchable organic integrated circuits
T. Sekitani, T. Yokota, K. Kuribara, T. Someya
Department of Electrical and Electronic Engineering and Department of Applied Physics, University of Tokyo, Bunkyo, Tokyo, Japan
DOI: 10.1109/ICMTS.2012.6190648
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A compact circuit for wafer-level monitoring of operational amplifier high-frequency performance using DC parametric test equipment
Z. G. Sparling, V. C. Tyree, N. Cox, P. T. Vernier
MOSIS Service, Information Sciences Institute, Viterbi School of Engineering, University of Southern California, Marina del Rey, CA, USA
DOI: 10.1109/ICMTS.2012.6190633
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New evaluation method of low-k dielectric films by using a gated PN-junction diode and a field MOS transistor
Y. Tamaki, M. Ito, M. Hashino, Y. Kawamoto
Consortium for Advanced Semiconductor Materials and Related Technologies, Kokubunji, Tokyo, Japan
DOI: 10.1109/ICMTS.2012.6190632
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Study on Device Matrix Array structure for MOSFET gm variability evaluation
K. Terada, R. Takeda, K. Tsuji, T. Tsunomura1, A. Nishida1, T. Mogami1
Faculty of Information Sciences, Hiroshima City University, Hiroshima, Japan
1MIRAI-Selete, Tsukuba, Ibaraki, Japan
DOI: 10.1109/ICMTS.2012.6190621
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Phase Change Memory advanced electrical characterization for conventional and alternative applications
A. Toffoli, M. Suri, L. Perniola1, A. Persico2, C. Jahan2, J. F. Nodin2, V. Sousa, B. DeSalvo, G. Reimbold
LETI, CEA, Grenoble, France
1CEA, LETI, MINATEC Campus, 17 rue des Martyrs, France
2CEA, LETI, MINATEC Campus, 17 rue des Martyrs, 38054 GRENOBLE Cedex 9, France
DOI: 10.1109/ICMTS.2012.6190618
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An improved procedure to extract the limiting carrier velocity in ultra scaled CMOS devices
P. Toniutti, R. Clerc, P. Palestri1, C. Diouf2, A. Cros2, D. Esseni1, F. Boeuf2, G. Ghibaudo, L. Selmi1
IMEP-LAHC, MINA TEC, Grenoble, France
1DIEGM, Udine, Italy
2STMicroelectronics, Crolles, France
DOI: 10.1109/ICMTS.2012.6190642
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A novel high-throughput on-wafer electromechanical sensitivity characterization system for piezoresistive cantilevers
G. Tosolini, L. G. Villanueva1, F. Perez-Murano, J. Bausells
Instituto de Microelectrónica de Barcelona (CNM, CSIC), Bellaterra, Spain
1California Institute of Technology, Pasadena, CA, USA
DOI: 10.1109/ICMTS.2012.6190613
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A novel test structure for FEOL device CCTG CBCM measurement in advanced 28nm technology
W. Tsao, Kin Hooi Dia, Zheng Zeng, Cheng Hsing Chien
MediaTek, Inc., Hsinchu, Taiwan
DOI: 10.1109/ICMTS.2012.6190658
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Threshold voltage variation extracted from MOSFET C-V curves by charge-based capacitance measurement
K. Tsuji, K. Terada, R. Takeda, T. Tsunomura1, A. Nishida1, T. Mogami1
Faculty of Information Sciences, Hiroshima City University, Hiroshima, Japan
1MIRAI-Selete, Tsukuba, Ibaraki, Japan
DOI: 10.1109/ICMTS.2012.6190623
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Very low frequency noise characterization of semiconductor devices using DC parameter analyzers
H. Tuinhout, A. Zegers-van Duijnhoven, A. Heringa
NXP Semiconductors-Central Research and Development, Eindhoven, Netherlands
DOI: 10.1109/ICMTS.2012.6190641
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Parameter extraction for relaxation-time based non-quasi-static MOSFET models
Z. Zhu, C. C. McAndrew1, Ik-Sung Lim1, G. Gildenblat
School of Electrical, Computer and Energy Engineering, Arizona State University, Tempe, AZ, USA
1Freescale Semiconductor, Inc., Tempe, AZ, USA
DOI: 10.1109/ICMTS.2012.6190645
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Modification and characterisation of material hydrophobicity for surface acoustic wave driven microfluidics
H. Zou, Y. Li, S. Smith, A. S. Bunting, A. J. Walton, J. G. Terry
Institute for Integrated Micro and Nano Systems, School of Engineering, Scottish Microelectronics Centre, University of Edinburgh, Edinburgh, UK
DOI: 10.1109/ICMTS.2012.6190614
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