IEEE International Conference on Microelectronic Test Structures
ICMTS 2011 Program
2011 Program Booklet
By First Author
| Microsecond pulsed DC matching measurements on MOSFETs in strong and weak inversion P. Andricciola, H. Tuinhout, N. Wils, J. Schmitz Central Research and Development, NXP Semiconductors, Eindhoven, Netherlands DOI: 10.1109/ICMTS.2011.5976866 HOVER FOR ABSTRACT | PDF Xplore | |
| A simple system for on-die measurement of atto-Farad capacitance E. Baruch, S. Shperber, R. Levy, Y. Weizman, J. Fridburg, R. Marks Freescale Semiconductor Israel Limited, Herzliya, Israel DOI: 10.1109/ICMTS.2011.5976854 HOVER FOR ABSTRACT | PDF Xplore | |
| Sensing mobility mismatch due to local interconnect mechanical stress in CMOS technology S. Blayac, C. Rivero1, P. Fornara1, L. Lopez1, N. Demange1 CMP/PS2, Ecole des Mines de Saint Etienne, Gardanne, France 1STMicroelectronics, Rousset, France DOI: 10.1109/ICMTS.2011.5976847 HOVER FOR ABSTRACT | PDF Xplore | |
| High temperature on-wafer measurement structure for DMOS characterization C. Boianceanu, D. Simon, R. Blanaru, D. Costachescu, M. Pfost1 Infineon Technologies Romania, IFRO ATV TM, Bucharest, Romania 1Robert-Bosch-Center of Power Electronics, Reutlingen University, Reutlingen, Germany DOI: 10.1109/ICMTS.2011.5976841 HOVER FOR ABSTRACT | PDF Xplore | |
| Decoupling of RTS noise in high density CMOS image sensor using new test structures J. -D. Bok, I. -S. Han, H. -M. Kwon, S. -U. Park, Y. -J. Jung, S. -H. Park, W. -I. Choi, M. -L. Ha, J. -I. Lee, H. -D. Lee Department of Electronics Engineering, Chungnam National University, Daejeon, South Korea DOI: 10.1109/ICMTS.2011.5976865 HOVER FOR ABSTRACT | PDF Xplore | |
| Simple current and capacitance methods for bulk finFET height extraction and correlation to device variability T. Chiarella, B. Parvais, N. Horiguchi, M. Togo, C. Kerner, L. Witters, P. Absil, S. Biesemans, T. Hoffmann IMEC vzw, Leuven, Belgium DOI: 10.1109/ICMTS.2011.5976879 HOVER FOR ABSTRACT | PDF Xplore | |
| Interdigitated electrode modelling for applications in dielectrophoresis C. Chung, S. Smith, A. Menachery, P. Bagnaninchi, A. J. Walton, R. Pethig Institute for Integrated Micro and Nano Systems, School of Engineering, Scottish Microelectronics Centre, University of Edinburgh, UK DOI: 10.1109/ICMTS.2011.5976863 HOVER FOR ABSTRACT | PDF Xplore | |
| Strategy for in-line MOS transistor transport optimization A. Cros Crolles Site, TResearch and Development/STD/TPS/ECR, STMicroelectronics, Crolles, France DOI: 10.1109/ICMTS.2011.5976860 HOVER FOR ABSTRACT | PDF Xplore | |
| Experimental procedure for accurate trap density study by low frequency charge pumping measurements A. Datta, F. Driussi, D. Esseni, G. Molas1, E. Nowak1 DIEGM, IU.NET, University of Udine, Udine, Italy 1Leti, CEA, Grenoble, France DOI: 10.1109/ICMTS.2011.5976876 HOVER FOR ABSTRACT | PDF Xplore | |
| Gap-closing test structures for temperature budget determination E. J. Faber, R. A. M. Wolters1, J. Schmitz MESA Institute for Nanotechnology, Semiconductor Components Group, University of Twente, Enschede, Netherlands 1NXP Semiconductors, Eindhoven, Netherlands DOI: 10.1109/ICMTS.2011.5976840 HOVER FOR ABSTRACT | PDF Xplore | |
| Test structures and a measurement system for characterising the lifetime of EWOD devices D. Gruber, Y. Li1, S. Smith1, A. Tiwari1, F. Deng1, A. A. Stokes2, J. G. Terry1, A. S. Bunting1, L. Mackay1, P. Langridge-Smith2, A. J. Walton1 SIRCAMS School of Chemistry, University of Edinburgh, Edinburgh, UK 1Scottish Microelectronic Centre, Institute of Micro and Nano Systems Institute of Integrated Systems School of Engineering, University of Edinburgh, Edinburgh, UK 2The University of Edinburgh, Edinburgh, Edinburgh, GB DOI: 10.1109/ICMTS.2011.5976864 HOVER FOR ABSTRACT | PDF Xplore | |
| Exploring capacitance-voltage measurements to find the piezoelectric coefficient of aluminum nitride T. van Hemert, D. Sarakiotis, S. Jose, R. J. E. Hueting, J. Schmitz MESA Institute for Nanotechnology, University of Twente, Enschede, Netherlands DOI: 10.1109/ICMTS.2011.5976862 HOVER FOR ABSTRACT | PDF Xplore | |
| Product relevant device leakage scribe characterization vehicle test chip for efficient full wafer testing C. Hess, R. Firu, R. Vallishayee, S. Yu, P. Zhao, S. Zhao PDF Solutions, Inc.orporated, San Jose, CA, USA DOI: 10.1109/ICMTS.2011.5976857 HOVER FOR ABSTRACT | PDF Xplore | |
| Novel BJT test structure for high-performance matching characteristics in CMOS-based analog applications Y. -J. Jung, B. -S. Park, I. -S. Han, H. -M. Kwon, S. -U. Park, J. -D. Bok, Y. -S. Chung, M. -G. Lim, J. -H. Lee, H. -D. Lee Department of Electronics Engineering, Chungnam National University, Daejeon, South Korea DOI: 10.1109/ICMTS.2011.5976846 HOVER FOR ABSTRACT | PDF Xplore | |
| Design of a test chip with small embedded temperature sensor structures realized in a common-drain power trench technology H. Köck, R. Illing1, T. Ostermann1, S. Decker2, D. Dibra2, G. Pobegen3, S. de Filippis4, M. Glavanovics3, D. Pogany Institute of Solid State Electronics, University of Technology, Vienna, Vienna, Austria 1DC ATV BP, Infineon Technologies Austria AG, Villach, Austria 2ATV PTP TD, Infineon Technologies, Neubiberg, Germany 3KAI (Kompetenzzentrum Automobil-und Industrie-Elektronik), Villach, Austria 4Department of Electronic and Telecommunication Engineering, University of Napoli Federico II, Naples, Italy DOI: 10.1109/ICMTS.2011.5976842 HOVER FOR ABSTRACT | PDF Xplore | |
| Scalable thermal resistance model for single and multi-finger silicon-on-insulator MOSFETs S. Khandelwal, J. Watts1, E. Tamilmani2, L. Wagner3 Department of Electronics and Telecommunication, Norwegian University of Science and Technology, Norway 1IBM Semiconductor Research and Development Centre, Burlington, USA 2IBM Semiconductor Research and Development Centre, Bangalore, India 3IBM Semiconductor Research and Development Centre, East Fishkill, USA DOI: 10.1109/ICMTS.2011.5976843 HOVER FOR ABSTRACT | PDF Xplore | |
| A versatile defectivity monitor designed for efficient test and failure analysis M. Lauderdale, B. Smith Freescale Semiconductor, Inc., Austin, TX, USA DOI: 10.1109/ICMTS.2011.5976855 HOVER FOR ABSTRACT | PDF Xplore | |
| Lateral bipolar structures for evaluating the effectiveness of surface doping techniques G. Lorito, L. Qi, L. K. Nanver DIMES, Delft University of Technnology, Delft, Netherlands DOI: 10.1109/ICMTS.2011.5976870 HOVER FOR ABSTRACT | PDF Xplore | |
| Innovative thin film deposition technologies enabling new materials and new device integration roadmaps J. W. Maes ASM, The Netherlands DOI: 10.1109/ICMTS.2011.5976869 HOVER FOR ABSTRACT | PDF Xplore | |
| Variation-sensitive monitor circuits for estimation of Die-to-Die process variation I. A. K. M. Mahfuzul, A. Tsuchiya, K. Kobayashi1, H. Onodera2 Graduate School of Informatics, Kyoto University, Kyoto, Japan 1Graduate School of Science and Technology, Kyoto Institute of Technology, Kyoto, Japan 2CREST, Japan Science and Technology Agency, Japan DOI: 10.1109/ICMTS.2011.5976878 HOVER FOR ABSTRACT | PDF Xplore | |
| Admittance characterization and interface trap property extraction for Ge/III-V MOS structures K. Martens IMEC, Belgium DOI: 10.1109/ICMTS.2011.5976850 HOVER FOR ABSTRACT | PDF Xplore | |
| Improved parameter extraction procedures for the R3 model C. C. McAndrew, T. Bettinger Freescale Semiconductor, Inc., Tempe, AZ, USA DOI: 10.1109/ICMTS.2011.5976858 HOVER FOR ABSTRACT | PDF Xplore | |
| Characterisation of electroplated NiFe films using test structures and wafer mapped measurements J. Murray, G. Schiavone1, S. Smith1, J. Terry1, A. R. Mount2, A. J. Walton1 School of Chemistry, University of Edinburgh, UK 1Institute for Integrated Micro and Nano Systems (part of the Joint Research Institute for Integrated Systems), School of Engineering, Scottish Microelectronics Centre, University of Edinburgh, Edinburgh, UK 2The University of Edinburgh, Edinburgh, Edinburgh, GB DOI: 10.1109/ICMTS.2011.5976861 HOVER FOR ABSTRACT | PDF Xplore | |
| Matching characteristics of metal resistors H. Namba, T. Hashimoto, K. Hayashi, M. Furumiya Device Framework Development Department, Renesas Electronics Corporation, 1753, Shimonumabe, Nakahara-Ku, Kawasaki, Kanagawa 211-8668, Japan DOI: 10.1109/ICMTS.2011.5976844 HOVER FOR ABSTRACT | PDF Xplore | |
 | An efficient array structure to characterize the impact of through silicon vias on FET devices D. Perry, J. Cho1, S. Domae2, P. Asimakopoulos3, A. Yakovlev3, P. Marchal4, G. Van der Plas4, N. Minas4 Qualcomm, San Diego, CA, USA 1Samsung, IMEC, Belgium 2Panasonic, IMEC, Belgium 3University of Newcastle, UK 4IMEC, Leuven, Belgium DOI: 10.1109/ICMTS.2011.5976872 HOVER FOR ABSTRACT | PDF Xplore |
| Front-end-of-line quadrature-clocked voltage-dependent capacitance measurement S. Polonsky, P. Solomon, J. -h. Liao1, L. Medina1, M. Ketchen IBM Thomson J.Watson Research Center, Yorktown Heights, NY, USA 1IBM Systems and Technology Group, Hopewell Junction, NY, USA DOI: 10.1109/ICMTS.2011.5976851 HOVER FOR ABSTRACT | PDF Xplore | |
| Low cost wafer level parallel test strategy for reliability assessments in sub-32nm technology nodes M. Rafik, F. Dieudonné, G. Morin Crolles Site, TResearch and Development, STD, TPS, ECR, STMicroelectronics, Crolles, France DOI: 10.1109/ICMTS.2011.5976856 HOVER FOR ABSTRACT | PDF Xplore | |
| Device variability and correlation control by automated tuning of SPICE cards to PCM measurements A. Revelant, L. Lucci, L. Selmi1, B. Ankele Infineon Technologies Austria AG, Villach, Austria 1DIEGM, Università degli Studi di Udine, Udine, Italy DOI: 10.1109/ICMTS.2011.5976877 HOVER FOR ABSTRACT | PDF Xplore | |
| Contact resistance measurement structures for high frequencies D. Roy, R. M. T. Pijper, L. F. Tiemeijer, R. A. M. Wolters Central Research and Development, NXP Semiconductors, Eindhoven, Netherlands DOI: 10.1109/ICMTS.2011.5976859 HOVER FOR ABSTRACT | PDF Xplore | |
| Gated diode in breakdown voltage collapse regime -- A test vehicle for oxide characterization A. Rusu, M. Badila1, A. Rusu University POLITEHNICA of Bucharest, Romania 1On Semiconductor, Santa Clara, CA, USA DOI: 10.1109/ICMTS.2011.5976875 HOVER FOR ABSTRACT | PDF Xplore | |
| Nonlinear network analyzer measurements for better transistor modeling F. Sischka Agilent Technologies, Inc., Boblingen, Germany DOI: 10.1109/ICMTS.2011.5976867 HOVER FOR ABSTRACT | PDF Xplore | |
| Silicon high frequency test structures improvement for millimeter wave varactors characterization optimization and modeling F. Sonnerat, R. Debroucke1, Y. Morandini2, D. Gloria, J. -D. Arnould3, C. Gaquière4 TRD, TPS Laboratory, STMicroelectronics, Crolles, France 1I.E.M.N, Villeneuve d'Ascq, France 2SRDC, IBM, Crolles, France 3IMEP, Grenoble, France 4NA DOI: 10.1109/ICMTS.2011.5976868 HOVER FOR ABSTRACT | PDF Xplore | |
| New test structure for evaluating low-k dielectric interconnect layers by using ring-oscillators and metal comb/serpentine patterns Y. Tamaki, M. Ito, Y. Takimoto1, M. Hashino, Y. Kawamoto Consortium for Advanced Semiconductor Materials and Related Technologies (CASMAT), Kokubunji-shi, Tokyo, JAPAN 1JSR Corporation, Japan DOI: 10.1109/ICMTS.2011.5976873 HOVER FOR ABSTRACT | PDF Xplore | |
| Electrical estimation of channel dopant uniformity using test MOSFET array K. Terada, K. Sanai, K. Tsuji, T. Tsunomura1, A. Nishida1, T. Mogami1 Faculty of Information Sciences, Hiroshima City University, Hiroshima, Japan 1MIRAI-Selete, Tsukuba, Ibaraki, Japan DOI: 10.1109/ICMTS.2011.5976871 HOVER FOR ABSTRACT | PDF Xplore | |
| Evaluation of MOSFET C-V curve variation using test structure for charge-based capacitance measurement K. Tsuji, K. Terada, R. Kikuchi, T. Tsunomura1, A. Nishida1, T. Mogami1 Faculty of Information Sciences, Hiroshima City University, Hiroshima, Japan 1MIRAI-Selete, Tsukuba, Ibaraki, Japan DOI: 10.1109/ICMTS.2011.5976852 HOVER FOR ABSTRACT | PDF Xplore | |
| Radiation effects upon the mismatch of identically laid out transistor pairs J. Verbeeck, P. Leroux, M. Steyaert1 Department IBW-RELIC, Katholieke hogeschool Kempen, Geel, Belgium 1Department ESAT-MICAS, Katholieke Universiteit Leuven, Heverlee, Belgium DOI: 10.1109/ICMTS.2011.5976845 HOVER FOR ABSTRACT | PDF Xplore | |
| Characterization and modelling of gate current injection in embedded non-volatile flash memory A. Zaka, D. Garetto1, D. Rideau, P. Palestri2, J. -P. Manceau1, E. Dornel1, Q. Rafhay3, R. Clerc3, Y. Leblebici4, C. Tavernier, H. Jaouen STMicroelectronics, Crolles, France 1IBM S and TG, Crolles, France 2DIEGM, University of Udine, Udine, Italy 3MINATEC, LAHC, IMEP, Grenoble, France 4Ecole Polytechnique Fédérale de Lausanne, Lausanne, Switzerland DOI: 10.1109/ICMTS.2011.5976874 HOVER FOR ABSTRACT | PDF Xplore | |
| Modeling the frequency dependence of MOSFET gate capacitance Z. Zhu, G. Gildenblat, C. C. McAndrew1, I. -S. Lim1 School of Electrical, Computer and Energy Engineering, Arizona State University, Tempe, AZ, USA 1Freescale Semiconductor, Inc., Tempe, AZ, USA DOI: 10.1109/ICMTS.2011.5976853 HOVER FOR ABSTRACT | PDF Xplore |
