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IEEE International Conference on Microelectronic Test Structures

ICMTS 2014 Program

2014 Program Booklet


By First Author

A novel apparatus for the volume estimation of in vitro thrombus growth
A. Affanni, R. Specogna, F. Trevisan
Dept. of Electrical, Mechanical and Management Engineering, University of Udine, Udine, Italy
DOI: 10.1109/ICMTS.2014.6841472
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Process parameter calibration for millimeter-wave CMOS back-end device design with electromagnetic field analysis
S. Amakawa, A. Orii, K. Katayama, K. Takano, M. Motoyoshi, T. Yoshida, M. Fujishima
Graduate School of Advanced Sciences of Matter, Hiroshima University, Higashihiroshima, Japan
DOI: 10.1109/ICMTS.2014.6841490
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Circuits to measure the delay variability of MOSFETs
K. Balakrishnan, K. Jenkins
IBM T.J. Watson Research Center, Yorktown Heights, NY, USA
DOI: 10.1109/ICMTS.2014.6841480
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Effects of metal spacing and poly-silicon layers on pulsed-laser single event transient testing
J. Bi, C. Zeng, L. Gao, D. Li, G. Liu, J. Luo, Z. Han, Z. Han1
Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China
1School of Microelectronics, University of Chinese Academy of Sciences, Beijing, China
DOI: 10.1109/ICMTS.2014.6841494
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Gated contact chains for process characterization in FinFET technologies
T. Brozek, S. Lam, S. Yu, M. Pak, T. Liu, R. Valishayee, N. Yokoyama1
PDF Solutions, San Jose, CA, USA
1PDF Solutions, KK, Tokyo, Japan
DOI: 10.1109/ICMTS.2014.6841469
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An approach to characterize ultra-thin conducting films protected against native oxidation by an in-situ capping layer
H. Van Bui, F. B. Wiggers, M. P. de Jong, A. Y. Kovalgin
MESA+ Institute for Nanotechnology, University of Twente, Enschede, AE, The Netherlands
DOI: 10.1109/ICMTS.2014.6841467
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A compact array for characterizing 32k transistors in wafer scribe lanes
C. S. Chen, L. Lil1, Q. Lim, H. H. Teh, N. F. Binti Omar, C. L. Ler2, J. T. Watt
Process Technology Development, Altera Corporation, San Jose, CA, USA
1Altera Corp, San Jose, CA, US
2Process Technology Development, Altera Corporation, Penang, Malaysia
DOI: 10.1109/ICMTS.2014.6841497
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Analysis of process impact on local variability thanks to addressable transistors arrays
A. Cros, T. Quemerais, A. Bajolet, Y. Carminati, P. Normandon, F. Kergomard, N. Planes, D. Petit, F. Arnaud, J. Rosa
Crolles Site, STMicroelectronics, France
DOI: 10.1109/ICMTS.2014.6841498
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A semi-distributed method for inductor de-embedding
J. Dang, A. Noculak1, F. Korndörfer2, C. Jungemann1, B. Meinerzhagen
BST, TU, Braunschweig, Germany
1ITHE, RWTH Aachen University, Aachen, Germany
2IHP GmbH, Frankfurt (Oder), Germany
DOI: 10.1109/ICMTS.2014.6841482
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Common-floating gate test structure for separation of cycling-induced degradation components in split-gate flash memory cells
N. Do, Y. Tkachev
Silicon Storage Technology, Inc. (a subsidiary of Microchip Technology Inc.), San Jose, CA, USA
DOI: 10.1109/ICMTS.2014.6841465
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Matched test structures for accurate characterization in millimeter wave range
R. Hamani, C. Andrei1, B. Jarry, J. Lintignat
XLIM, Limoges, France
1NXP Semiconductors, France
DOI: 10.1109/ICMTS.2014.6841483
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Direct probing characterization vehicle test chip for wafer level exploration of transistor pattern on product chips
C. Hess, L. Weiland, A. Joag, B. Murugan, S. Zhao, K. Doong1, S. Lin1, H. Eisenmann2
PDF Solutions Inc., San Jose, CA, USA
1PDF Solutions Inc., Zhubei City, Hsinchu County, Taiwan, R.O.C.
2PDF Solutions Inc., Munich, Germany
DOI: 10.1109/ICMTS.2014.6841496
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Accurate modeling of dynamic variability of SRAM cell in 28 nm FDSOI technology
J. El Husseini, A. Subirats, X. Garros, A. Makoseij, O. Thomas, G. Reimbold, V. Huard1, F. Cacho1, X. Federspiel1
CEA-Leti, Grenoble, France
1STMicroelectronics, Crolles cedex, France
DOI: 10.1109/ICMTS.2014.6841466
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In-situ variability characterization of individual transistors using topology-reconfigurable ring oscillators
A. K. M. Mahfuzul Islam, H. Onodera
Graduate School of Informatics, Kyoto University, Sakyo-ku, Kyoto, JAPAN
DOI: 10.1109/ICMTS.2014.6841479
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A new technique for probing the energy distribution of positive charges in gate dielectric
Z. Ji, S. W. M. Hatta, J. F. Zhang, W. Zhang, J. Niblock, P. Bachmayr, L. Stauffer, K. Wright, S. Greer
School of Engineering, Liverpool John Moores University, Liverpool, UK
DOI: 10.1109/ICMTS.2014.6841470
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A test structure for analysis of temperature distribution in stacked IC with sensing device array
T. Matsuda, K. Yamada, H. Iwata, T. Hatakeyama, M. Ishizuka, T. Ohzone1
Toyama Prefectural University, Toyama, Japan
1Dawn Enterprise, Nagoya, Japan
DOI: 10.1109/ICMTS.2014.6841476
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Thickness evaluation of deposited pureb layers in micro-/millimeter-sized windows to Si
V. Mohammadi, S. Ramesh, L. K. Nanver
Dept. Microelectronics, Delft University of Technology, Delft, CT, The Netherlands
DOI: 10.1109/ICMTS.2014.6841492
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A test structure of bypass diodes for on-chip high-voltage silicon photovoltaic cell array
I. Mori, M. Kubota, Y. Mita
Department of Electrical Engineering, The University of Tokyo, Tokyo, Japan
DOI: 10.1109/ICMTS.2014.6841485
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Effective field and universal mobility in high-k metal gate UTBB-FDSOI devices
O. Nier, D. Rideau1, A. Cros1, F. Monsieur1, G. Ghibaudo2, R. Clerc3, J. C. Barbé4, C. Tavernier1, H. Jaouen1
DIEGM, University of Udine, Udine, Italy
1STMicroelectronics, Crolles, France
2IMEP-LAHC, Grenoble
3Laboratoire Hubert Curien (UMR 5516), Institut d'Optique Graduate School, Saint-Etienne, France
4CEA-LETI, Grenoble, France
DOI: 10.1109/ICMTS.2014.6841460
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On wafer silicon integrated noise source characterization up to 110 GHz based on Germanium-on-Silicon photodiode
S. Oeuvrard, J. . -F. Lampin, G. Ducournau, S. Lepilliet, F. Danneville, T. Quemerais1, D. Gloria1
IEMN, Villeneuve d'Ascq, France
1STMicroelectronics, Crolles Cedex, France
DOI: 10.1109/ICMTS.2014.6841484
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Low specific contact resistivity nickel to silicon carbide determined using a two contact circular test structure
Y. Pan, A. M. Collins, P. W. Leech, G. K. Reeves, A. S. Holland1, P. Tanner2
School of Electrical and Computer Engineering, RMIT University, Melbourne, Australia
1Centre of Technology, RMIT University, Ho Chi Minh City, Vietnam
2Queensland Microtechnology Facility, Griffith University, Brisbane, Australia
DOI: 10.1109/ICMTS.2014.6841471
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A single-photon avalanche diode test chip in 150nm CMOS technology
L. Pancheri, G. -F. Dalla Betta, L. H. Campos Braga1, H. Xu1, D. Stoppa1
DII, University of Trento Via Sommarive, Trento, Italy
1Fondazione Bruno Kessler, Trento, Italy
DOI: 10.1109/ICMTS.2014.6841486
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Split-CV for pseudo-MOSFET characterization: Experimental setups and associated parameter extraction methods
L. Pirro, I. Ionica, G. Ghibaudo, S. Cristoloveanu
IMEP-LAHC Grenoble, France
DOI: 10.1109/ICMTS.2014.6841461
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Cascode configuration as a substitute to LDE MOSFET for improved electrical mismatch performance
L. Rahhal, G. Bertrand1, A. Bajolet1, J. Rosa1, G. Ghibaudo
IMEP-LAHC, Grenoble, France
1STMicroelectronics, France
DOI: 10.1109/ICMTS.2014.6841499
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Air-CPW test structure for broadband permeability spectra measurements of thin ferromagnetic films
E. Sirotkin, R. Walker, J. G. Terry, S. Smith, A. J. Walton
Scottish Microelectronics Centre, University of Edinburgh, Edinburgh, UK
DOI: 10.1109/ICMTS.2014.6841489
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Test structure to evaluate the impact of neighboring features on stress of metal interconnects
B. Smith, M. Shroff
Freescale Semiconductor, Inc., Austin, TX
DOI: 10.1109/ICMTS.2014.6841495
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Extraction procedure for emitter series resistance contributions in SiGeC BiCMOS technologies
F. Stein, Z. Huszka1, N. Derrier2, C. Maneux, D. Celi2
IMS, Université Bordeaux I, Talence, France
1AMS AG, Unterpremstatten, Austria
2STMicroelectronics, France
DOI: 10.1109/ICMTS.2014.6841462
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Characterization and development of materials for an integrated high-temperature sensor using resistive test structures
A. Tabasnikov, A. S. Bunting, J. G. Terry, J. Murray, G. Cummins1, C. Zhao2, J. Zhou2, R. Y. Fu2, M. P. Y. Desmulliez1, A. J. Walton, S. Smith
Institute for Integrated Micro and Nano Systems, The University of Edinburgh, Edinburgh, UK
1School of Engineering and Physical Sciences, Heriot-Watt University, Edinburgh, UK
2School of Engineering, University of the West of Scotland, Paisley, UK
DOI: 10.1109/ICMTS.2014.6841491
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Understanding the switching mechanism of charge-injection GeTe/Sb2Te3 phase change memory through electrical measurement and analysis of 1R test structure
N. Takaura, T. Ohyanagi, M. Tai, M. Kitamura, M. Kinoshita, K. Akita, T. Morikawa, S. Kato1, M. Araidai1, K. Kamiya1, T. Yamamoto1, K. Shiraishi1
Phase Change Device Research Group, Low-power Electronics Association & Project (LEAP), Tsukuba, Ibaraki, Japan
1Graduate School of Pure and Applied Sciences, University of Tsukuba, Tsukuba, Ibaraki, Japan
DOI: 10.1109/ICMTS.2014.6841464
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Test structure for electrical characterization of copper nanowire anisotropic conductive film (NW-ACF) for 3D stacking applications
J. Tao, A. Mathewson, K. M. Razeeb
Microsystems Center, Tyndall National Institute, Cork, Ireland
DOI: 10.1109/ICMTS.2014.6841487
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Reconsideration of effective MOSFET channel length extracted from channel resistance
K. Terada
Faculty of Information Sciences, Hiroshima City University, Hiroshima, JAPAN
DOI: 10.1109/ICMTS.2014.6841459
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Compressively-stressed test structures for opaque micro-stmctures releasing visualization
A. Tixier-Mita, E. Lebrasseur, T. Takahashi, Y. Mita1, H. Fujita1, H. Toshiyoshi2, F. Olivier2, L. P. Bruno2
The University of Tokyo, Tokyo, Japan
1Tokyo Daigaku, Bunkyo-ku, Tokyo, JP
2Departernent SATIE/IFR, Ecole Nationale Supérieure Cachan, France
DOI: 10.1109/ICMTS.2014.6841488
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A novel compact model of the product marginal yield and its application for performance maximization
A. Tsuda, T. Okagaki, M. Fujii, T. Tsutsui, Y. Takazawa, K. Shibutani, S. Ogasawara, M. Yokota, K. Onozawa
Device Platform Dep, Renesas Electronics Corporation, Itami, Hyogo, Japan
DOI: 10.1109/ICMTS.2014.6841478
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Evaluation of ultra-low specific contact resistance extraction by cross-bridge Kelvin resistor structure and transmission line method structure
B. -Y. Tsui, H. -T. Tseng
Department of Electronics Engineering, National Chiao-Tung University, Hsinchu, Taiwan R. O. C
DOI: 10.1109/ICMTS.2014.6841468
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Comparison of channel length extracted from gate capacitance with that extracted from channel resistance
K. Tsuji, K. Terada
Faculty of Information Sciences, Hiroshima City University, Hiroshima, JAPAN
DOI: 10.1109/ICMTS.2014.6841473
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A cross-coupled common centroid test structures layout method for high precision MIM capacitor mismatch measurements
H. Tuinhout, N. Wils
NXP Semiconductors - Central R&D, Design Platforms Organization, High Tech Campus Eindhoven, the Netherlands
DOI: 10.1109/ICMTS.2014.6841500
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Calibration methods for silicon nanowire BioFETs
A. Vacic, J. M. Criscione, E. Stern, N. K. Rajan1, T. Fahmy, M. A. Reed1
Yale University, New Haven, CT, US
1Yale University, New Haven, CT, USA
DOI: 10.1109/ICMTS.2014.6841493
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Characterisation of residual stress in dielectric films studied by automated wafer mapping
R. Walker, E. Sirotkin, G. Schiavone, J. G. Terry, S. Smith, A. R. Mount1, M. P. Y. Desmulliez2, A. J. Walton
Institute of Integrated Micro and Nano Systems, The University of Edinburgh, UK
1School of Chemistry, The University of Edinburgh, UK
2MIcroSystems Engineering Centre, Heriot-Watt University, Edinburgh, UK
DOI: 10.1109/ICMTS.2014.6841475
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Effect of seed layers on the performance of planar spiral microinductors
R. Walker, E. Sirotkin, J. G. Terry, S. Smith, M. P. Y. Desmulliez1, A. J. Walton
Institute of Integrated Micro and Nano Systems, The University of Edinburgh, UK
1Heriot-Watt University, Edinburgh, Edinburgh, GB
DOI: 10.1109/ICMTS.2014.6841481
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3D IC testing using a chip prober and a transparent membrane probe card
N. Watanabe, M. Aoyagi, M. Eto1, K. Kawano1
Nano-electronics Research Institute, National Institute of Advanced Industrial Science and Technology (AIST), Tsukuba-shi, Ibaraki, Japan
1STK TECHNOLOGY CO., LTD., Oita-shi, Oita, Japan
DOI: 10.1109/ICMTS.2014.6841474
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Processor yield at 14nm and beyond
G. Yeric
Research and Development, ARM Austin, TX, USA
DOI: 10.1109/ICMTS.2014.6841477
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Statistical analysis of resistive switching characteristics in ReRAM test arrays
C. Zambelli, A. Grossi, P. Olivo, D. Walczyk1, T. Bertaud1, B. Tillack1, T. Schroeder2, V. Stikanov3, C. Walczyk1
Dipartimento di Ingegneria, Università degli Studi di Ferrara, Ferrara, Italy
1IHP Microelectronics, Frankfurt (Oder), Germany
2Brandenburgische Technische Universität, Cottbus, Germany
3IASA, Kiev, Ukraine
DOI: 10.1109/ICMTS.2014.6841463
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