IEEE International Conference on Microelectronic Test Structures
ICMTS 2000 Program
2000 Program Booklet
By First Author
| Characterization of mask alignment offsets using null wire segment holograms and a progressive offset technique S. A. AbuGhazaleh, P. Christie1, S. Smith2, A. M. Gundlach2, J. T. M. Stevenson3, A. J. Walton2 Dept. of Electr. & Comput. Eng., Delaware Univ., Newark, DE, USA 1Department or Electrical and Computcr Engineering, University of Delaware, Newark, DE, USA 2Department of Electronics and Electrical Engineering, University of Edinburgh, Edinburgh, UK 3NA DOI: 10.1109/ICMTS.2000.844395 HOVER FOR ABSTRACT | PDF Xplore | |
| A novel method for fabricating CD reference materials with 100 nm linewidths R. A. Allen, L. W. Linholm, M. W. Cresswell1, C. H. Ellenwood2 Semiconductor Elcctroriics Division, National Institute for Standards and Technology, Gaithersburg, MD, USA 1National Institute of Standards and Technology, Gaithersburg, MD, US 2NA DOI: 10.1109/ICMTS.2000.844396 HOVER FOR ABSTRACT | PDF Xplore | |
| On-chip voltage noise monitor for measuring voltage bounce in power supply lines using a digital tester H. Aoki, M. Ikeda, K. Asada1 Department of Electronic Engineering,VLSI Design and Edocntion Center, University of Tokyo, Tokyo, Japan 1NA DOI: 10.1109/ICMTS.2000.844416 HOVER FOR ABSTRACT | PDF Xplore | |
| Fowler Nordheim induced light emission from MOS diodes P. Bellutti, G. . -F. Dalla Betta, N. Zorzi, R. Versari1, A. Pieracci2, B. Ricco1, M. Manfredi3, G. Soncini4 ItC IRST Divisone Micrositcmi, Italy 1Dipartimento fi Elottronica Iuformatica C Sistomisttica, Università di Bologna, Bologna, Italy 2NA 3Dipartimento di Fisica e INFM, Università di Parma, Parma, Italy 4Dipartimento di Engegneria dei Materiali, Università di Trento, Trento, Italy DOI: 10.1109/ICMTS.2000.844435 HOVER FOR ABSTRACT | PDF Xplore | |
| Gate-length dependence of bulk generation lifetime and surface generation velocity measurement in high-resistivity silicon using gated diodes G. . -F. Dalla Betta, G. Verzellesi1, T. Boscardin2, G. U. Pignatel3, L. Bosisio4, G. Soncini2 Divisione Microsistemi, ITC IRST, Italy 1Dipartimento di Scienze dell Ingegneria, Universita di Modena e Reggio Emilia, Italy 2NA 3Dipartmento di Ingegneria dei Materiali, Universita di Trento, Italy 4Dipartimento di Fisica, Universita di Trieste and INFN sezione di Trieste, Italy DOI: 10.1109/ICMTS.2000.844410 HOVER FOR ABSTRACT | PDF Xplore | |
| A microelectronic test structure for signal integrity characterization in deep submicron technology F. Caignet, S. D. . -B. Dhia1, E. Sicard2 Complexe Sci. de Rangueil, Inst. Nat. des Sci. Appliquees, Toulouse, France 1NA 2Complexe Scientifique de rangueil, INSA-Toulouse, Toulouse, France DOI: 10.1109/ICMTS.2000.844407 HOVER FOR ABSTRACT | PDF Xplore | |
| Comparison between S-parameter measurements and 2D electromagnetic simulations for microstrip transmission lines on BiCMOS process J. F. Carpentier, S. Gellida1, D. Gloria, G. Morin, H. Jaouen1 Centrai R&D, STMicroelectronics, Crolles, France 1NA DOI: 10.1109/ICMTS.2000.844437 HOVER FOR ABSTRACT | PDF Xplore | |
| Extraction of the channel thermal noise in MOSFETs Chih-Hung Chen, M. J. Deen, M. Matloubian1, Yuhua Cheng1 Electrical and Computer Engineering, McMaster University, Hamilton, ONT, Canada 1Conexant Systems, Inc., Newport Beach, CA, USA DOI: 10.1109/ICMTS.2000.844403 HOVER FOR ABSTRACT | PDF Xplore | |
| Influence of input voltage swing on 0.18 µm NMOS aging estimated by self-stressing testers S. Chetlur, J. Zaneski, L. Mullin, A. Oates1, R. A. Ashton, H. Chew, J. Zhou Lucent Thechnology, Bell Laboratories, Orlando, FL, USA 1NA DOI: 10.1109/ICMTS.2000.844425 HOVER FOR ABSTRACT | PDF Xplore | |
| Characterization of electrical linewidth test structures patterned in [100] silicon-on-insulator for use as CD standards M. W. Cresswell, R. A. Allen, R. N. Ghoshtagore1, N. M. P. Guillaume2, P. J. Shea3, S. C. Everist3, L. W. Linholm Semiconductor Electronics Division, National Institute for Standards and Technology, Gaithersburg, MD, USA 1NA 2Guest Kesearcher at NIST from George, Washington University, WA, USA 3Sandia National Laboratories, Albuquerque, NM, USA DOI: 10.1109/ICMTS.2000.844393 HOVER FOR ABSTRACT | PDF Xplore | |
| Addressable failure site test structures (AFS-TS) for process development and optimization K. Y. . -Y. Doong, Sunnys Hsieh1, Sheng-Che Lin1, Binson Shen1, Wang Chien-Jung2, Yen-Hen Ho1, Jye-Yen Cheng1, Yeu-Haw Yang1, K. Miyamoto3, C. C. . -H. Hsu2 Worldwide Semicond. Manuf. Corp., Shinchu, Taiwan 1Worldwide Semiconductor Manufacturing Corporation, Hsinchu, Taiwan 2Microelectronics Laboratory, Semiconductor Technology and Application Research Group, China 3MOS Process Integration technology Dcpartnient, Micro & Custom LSI Division, Toshiba Corporation, Yokohama, Japan DOI: 10.1109/ICMTS.2000.844404 HOVER FOR ABSTRACT | PDF Xplore | |
| Rapid evaluation of the root causes of BJT mismatch P. G. Drennan, C. C. McAndrew1, J. Bates1, D. Schroder2 Motorola Inc., Tempe, AZ, USA 1Motorola, Inc., Tempe, AZ, USA 2Arizona State University, Tempe, AZ, USA DOI: 10.1109/ICMTS.2000.844418 HOVER FOR ABSTRACT | PDF Xplore | |
| A new test structure to measure metal linewidths using minimum real estate M. Fallen, D. McAlpine1 Analog Process Technol. Dev., Nat. Semicond. UK Ltd., Greenock, UK 1Analog Process Technology Development, National Semiconductor (UK) Limited, Greenock, UK DOI: 10.1109/ICMTS.2000.844394 HOVER FOR ABSTRACT | PDF Xplore | |
| Comparing high-frequency de-embedding strategies: immittance correction and in-situ calibration R. Gillon, W. Van De Sype1, D. Vanhoenaker2, L. Martens1 Alcatel Microelectronics, Oudenaarde, Belgium 1INTEC, University of Ghent, Ghent, Belgium 2NA DOI: 10.1109/ICMTS.2000.1193989 HOVER FOR ABSTRACT | PDF Xplore | |
| A new extraction method of high frequency noise parameters in the temperature range -55/150 deg. for SiGe HBT in BiCMOS process D. Gloria, S. Gellida, G. Morin STMicroelectronics Central Research and Development, Crolles, France DOI: 10.1109/ICMTS.2000.844436 HOVER FOR ABSTRACT | PDF Xplore | |
| Embedded compact test structure with a comparator for rapid device characteristic measurement J. Goto, S. Kuwabara1, T. Tsujide2 Device Analysis Technology Labs., NEC Corporation Limited, Kawasaki, Japan 1Nihon Denki Kabushiki Kaisha, Minato-ku, Tokyo, JP 2NA DOI: 10.1109/ICMTS.2000.844430 HOVER FOR ABSTRACT | PDF Xplore | |
| Thermo-mechanical structures for the optimisation of silicon micromachined gas sensors A. Gotz, I. Gracia1, C. Cane2, M. Lozano2, E. Lora-Tamayo3 Centro Nacional de Microelectron., Bellaterra, Spain 1Centro National de Microelectrónica IMB-CSIC, Bellaterra, Spain 2Consejo Superior de Investigaciones Cientificas, Madrid, Madrid, ES 3NA DOI: 10.1109/ICMTS.2000.844411 HOVER FOR ABSTRACT | PDF Xplore | |
| Characterization and modeling of LDMOS transistors on a 0.6 µm CMOS technology E. C. Griffith, J. A. Power, S. C. Kelly, P. Elebert1, S. Whiston, D. Bain, M. O'Neill Analog Devices, Raheen Industrial Estate, Limerick, Ireland 1NA DOI: 10.1109/ICMTS.2000.844427 HOVER FOR ABSTRACT | PDF Xplore | |
| Fast extraction of killer defect density and size distribution using a single layer short flow NEST structure C. Hess, D. Stashower1, B. E. Stine1, G. Verna2, L. H. Weiland1, K. Miyamoto3, K. Inoue3 PDF Solutions Inc., San Jose, CA, USA 1PDF Solutions, Inc.orporated, San Jose, CA, USA 2NA 3Toshiba Corporation, Yokohama, Japan DOI: 10.1109/ICMTS.2000.844405 HOVER FOR ABSTRACT | PDF Xplore | |
| Optimization of low-k dielectric (fluorinated SiO2) process and evaluation of yield impact by using BEOL test structures Sunnys Hsieh, K. Y. . -Y. Doong1, Yen-Hsuan Ho2, Sheng-Che Lin2, Binson Shen2, Sing-Mo Tseng2, Yeu-Haw Yang2, C. C. . -H. Hsu1 Worldwide Semicond. Manuf. Corp., Hsinchu, Taiwan 1Microelectronics Laboratory, Semiconductor Teclinology & Application Research Group, Department of Electrical Engineering, National Tsing Hua University, China 2Worldwide Semiconductor Manufacturing Corporation, Hsinchu, Taiwan DOI: 10.1109/ICMTS.2000.844432 HOVER FOR ABSTRACT | PDF Xplore | |
| A differential floating gate capacitance mismatch measurement technique J. Hunter, P. Gudem1, S. Winters Silicon Technology Scrviccs, Cadence Design Systems, Inc., San Diego, CA, USA 1NA DOI: 10.1109/ICMTS.2000.844421 HOVER FOR ABSTRACT | PDF Xplore | |
| A new mobility model for circuit simulation in pocket implanted MOSFET's P. Klein, F. Schuler1 Infineon Technologies, Munich, Germany 1Intineon Technologies AG, Munich, Germany DOI: 10.1109/ICMTS.2000.844413 HOVER FOR ABSTRACT | PDF Xplore | |
| Characterization of trench isolation for BiCMOS technologies J. H. Klootwijk, G. C. Muda, D. Terpstra Philips Research Laboratory Eindhoven, Eindhoven, Netherlands DOI: 10.1109/ICMTS.2000.844431 HOVER FOR ABSTRACT | PDF Xplore | |
| Thermal channel noise of quarter and sub-quarter micron NMOSFET's G. Knoblinger, P. Klein1, U. Baumann2 Infineon Technol. AG, Germany 1INFINCON TECHNOIOGIES AG, Germany 2IMMS DMENAU Germany, MUNICH, Germany DOI: 10.1109/ICMTS.2000.844412 HOVER FOR ABSTRACT | PDF Xplore | |
| Ground-shielded measuring technique for accurate on-wafer characterization of RF CMOS devices T. E. Kolding, O. K. Jensen1, T. Larsen RF Integratecl Systems & Circuits RISC Group, University of Aalborg, Denmark 1NA DOI: 10.1109/ICMTS.2000.844439 HOVER FOR ABSTRACT | PDF Xplore | |
| Test structure for universal estimation of MOSFET substrate effects at gigahertz frequencies T. E. Kolding RF Integrated Systems & Circuits RKC group, University of Aalborg, Denmark DOI: 10.1109/ICMTS.2000.844415 HOVER FOR ABSTRACT | PDF Xplore | |
| Characterisation of aluminium passivation for TMAH based anisotropic etching for MEMS applications Knut Lian, S. Smith1, N. Rankin1, A. J. Walton2, A. Gundlach1, T. Stevenson1 SensoNor asa, Horten, Norway 1Department of Electronics and Electrical Engineering, University of Edinburgh, Edinburgh, UK 2NA DOI: 10.1109/ICMTS.2000.844433 HOVER FOR ABSTRACT | PDF Xplore | |
| An electrical technique for determining MOSFET gate length reduction due to process micro-loading effects in advanced CMOS technology Chunbo Liu, J. Ma, Jeong Choi Intcgroted Dcvice Iczluiulogy, Inc., Santa Clara, CA, USA DOI: 10.1109/ICMTS.2000.844417 HOVER FOR ABSTRACT | PDF Xplore | |
| Physically-based effective width modeling of MOSFETs and diffused resistors C. C. McAndrew, S. Sekine1, A. Cassagnes2, Zhicheng Wu2 Motorola Inc., Tempe, AZ, USA 1NA 2Motorola, Inc., Tempe, AZ, USA DOI: 10.1109/ICMTS.2000.844426 HOVER FOR ABSTRACT | PDF Xplore | |
| New method for parameter extraction in deep submicrometer MOSFETs C. Mourrain, B. Cretu1, G. Ghibaudo2, P. Cottin France Telecom CNET Grenoble, Meylan, France 1Laboratory Physiquc des Coinposants à Semiconductcurs, ENSERG, Grenoble, France 2NA DOI: 10.1109/ICMTS.2000.844428 HOVER FOR ABSTRACT | PDF Xplore | |
| A new extraction method of retention time from the leakage current in 0.23 µm DRAM memory cell Choong-Mo Nam, Sung-Kye Park, Sang-Ho Lee, Jai-Bum Suh, Gyu-Han Yoon, Sung-Ho Jang Refresh Development Team, Memory R& D Division, Hyundai MicroElectronics Company, Limited, Kyoungki, South Korea DOI: 10.1109/ICMTS.2000.844414 HOVER FOR ABSTRACT | PDF Xplore | |
| A study on hot-carrier-induced photoemission in n-MOSFETs under dynamic operation T. Ohzone, M. Yuzaki, T. Matsuda, E. Kameda Department of Electronics and Informatics, Toyama Prefectural University, Toyama, Japan DOI: 10.1109/ICMTS.2000.844408 HOVER FOR ABSTRACT | PDF Xplore | |
| Fabrication of twin transistors using sidewall masks for evaluating threshold voltage fluctuation M. Okuno, T. Aoyama, S. Nakamura, R. Sugino, H. Arimoto Fujitsu Laboratories Limited, Atsugi, Japan DOI: 10.1109/ICMTS.2000.844401 HOVER FOR ABSTRACT | PDF Xplore | |
| High-spatial-frequency MOS transistor gate length variations in SRAM circuits X. Ouyang, T. Deeter1, C. N. Berglund, R. F. W. Pease, M. A. McCord1 Center for Integrated Systems, University of Stanford, Stanford, CA, USA 1NA DOI: 10.1109/ICMTS.2000.844400 HOVER FOR ABSTRACT | PDF Xplore | |
| Select transistor modulated cell array structure test for EEPROM reliability F. Pio, E. Gomiero Ceiltral R&D, STMicroelectronics, Agrate-Brianza, Italy DOI: 10.1109/ICMTS.2000.844434 HOVER FOR ABSTRACT | PDF Xplore | |
| SPICE sensitivity analysis of a bipolar test structure during process development N. Rankin, A. J. Walton, J. McGinty1, M. Fallon1 Department of Electrical and Electrical Engineering King's Buildings, University of Edinburgh, Edinburgh, UK 1Larkfield Industrial Estate, National Semiconductor (UK) Limited, Greenock, UK DOI: 10.1109/ICMTS.2000.844429 HOVER FOR ABSTRACT | PDF Xplore | |
 | A novel approach for precise characterization of long distance mismatch of CMOS-devices U. Schaper, C. Linnenbank, R. Thewes1 Infineon Technologies AG, Corporate Frontends CFE SIM 1Corporate Research CPR 7, Munich, Germany DOI: 10.1109/ICMTS.2000.844422 HOVER FOR ABSTRACT | PDF Xplore |
| Use of test structures for Cu interconnect process development and yield enhancement A. Skumanich, Man-Ping Cai, J. Educato1, D. Yost Applied Materials, Inc., Santa Clara, CA, USA 1NA DOI: 10.1109/ICMTS.2000.844406 HOVER FOR ABSTRACT | PDF Xplore | |
| Electromigration test structure designed to identify via failure modes T. S. Sriram Compaq Computer Corporation, Shrewsbury, MA, USA DOI: 10.1109/ICMTS.2000.844423 HOVER FOR ABSTRACT | PDF Xplore | |
| On the matching behavior of MOSFET small signal parameters R. Thewes, C. Linnenbank1, U. Kollmer1, S. Burges2, M. DiLeo, M. Clincy, U. Schaper1, R. Brederlow3, R. Seibert4, W. Weber Infineon Technohgies, Corporate Research and Development, Munich, Germany 1CPE SIM, Infineon Technologies 2PS TM 2, Infineon Technologies 3NA 4CPD DAT, Infineon Technologies DOI: 10.1109/ICMTS.2000.844420 HOVER FOR ABSTRACT | PDF Xplore | |
| Characterization of sub-micron MOS transistors, modified using a focused ion beam system D. W. Travis, C. M. Reeves, A. J. Walton, A. M. Gundlach, J. T. M. Stevenson1 Department of Electronics and Electrical Engineering, University of Edinburgh, Edinburgh, UK 1NA DOI: 10.1109/ICMTS.2000.844402 HOVER FOR ABSTRACT | PDF Xplore | |
| Extraction of effective LDMOSFET channel length and its application to the modeling K. Tsuji, K. Terada, M. Minami, K. Tanaka1 Faculty of Information Sciences, Hiroshima City University, Hiroshima, Japan 1Semiconductor Division, NEC Corporation Limited, Kawasaki, Japan DOI: 10.1109/ICMTS.2000.844409 HOVER FOR ABSTRACT | PDF Xplore | |
| | Characterisation of systematic MOSFET transconductance mismatch H. Tuinhout Philips Res., Eindhoven, Netherlands DOI: 10.1109/ICMTS.2000.844419 HOVER FOR ABSTRACT | PDF Xplore |
| Reliability evaluation method of low temperature poly-silicon TFTs using dynamic stress Y. Uraoka, T. Hatayama, T. Fuyuki Graduute School of Materials Science, Nara Institute of Science and Technology, Ikoma, Nara, Japan DOI: 10.1109/ICMTS.2000.844424 HOVER FOR ABSTRACT | PDF Xplore |
