IEEE International Conference on Microelectronic Test Structures
ICMTS 2006 Program
2006 Program Booklet
By First Author
| C-V test structures for metal gate CMOS R. G. Bankras, M. P. J. Tiggelman1, M. Adi Negara2, G. T. Sasse1, J. Schmitz1 ASM International N. V., Almere, Netherlands 1MESA Institute for Nanotechnology, Group Semiconductor Components, University of Twente, Enschede, Netherlands 2Tyndall National Institute, Cork, Ireland DOI: 10.1109/ICMTS.2006.1614309 HOVER FOR ABSTRACT | PDF Xplore | |
| Impact of neighbor components heating on power transistor electrical behavior H. Beckrich, S. Ortolland1, D. Pache1, D. Celi1, D. Gloria1, T. Zimmer Laboratoire IXL, Université Bordeaux 1, Talence, France 1STMicroelectronics Private Limited, Crolles, France DOI: 10.1109/ICMTS.2006.1614304 HOVER FOR ABSTRACT | PDF Xplore | |
 | Ring oscillator based technique for measuring variability statistics M. Bhushan, M. B. Ketchen1, S. Polonsky1, A. Gattiker2 IBM Systems and Technology Group, Poughkeepsie, NY, USA 1IBM Thomson J.Watson Research Center, Yorktown Heights, NY, USA 2IBM Research, Austin, TX, USA DOI: 10.1109/ICMTS.2006.1614281 HOVER FOR ABSTRACT | PDF Xplore |
| Analysis and modeling of substrate impedance network in RF CMOS E. Bouhana, P. Scheer1, S. Boret1, D. Gloria1, G. Dambrine, M. Minondo1, H. Jaouen1 I.E.M.N, Villeneuve d'Ascq, France 1STMicroelectronics Private Limited, Crolles, France DOI: 10.1109/ICMTS.2006.1614277 HOVER FOR ABSTRACT | PDF Xplore | |
| Improved methodology for better accuracy on transistors matching characterization A. Cathignol, K. Rochereau1, S. Bordez, G. Ghibaudo2 STMicroelectronics Private Limited, Crolles, France 1Philips semiconductors, Crolles, France 2IMEP, Grenoble, France DOI: 10.1109/ICMTS.2006.1614298 HOVER FOR ABSTRACT | PDF Xplore | |
| Methodology for characterizing the impact of circuit layout, technology options, device engineering and temperature on the circuit power-delay characteristics T. Chiarella, J. Ramos, A. Nackaerts, S. Demuynck, S. Verhaegen, R. Verbeeck, M. de Potter de ten Broeck, C. Kerner, T. Hoffmann, M. Van Hove, I. Debusschere, S. Biesemans IMEC vzw, Leuven, Belgium DOI: 10.1109/ICMTS.2006.1614282 HOVER FOR ABSTRACT | PDF Xplore | |
| High-frequency measurements of the mismatch on the Y-parameters of high-speed SiGe:C HBTs L. J. Choi, R. Venegas, S. Decoutere IMEC, Leuven, Belgium DOI: 10.1109/ICMTS.2006.1614296 HOVER FOR ABSTRACT | PDF Xplore | |
| Investigation of lateral charge distribution of 2-bit SONOS memory devices using physically separated twin SONOS structure Byung Yong Choi, Choong-Ho Lee1, Yong Kyu Lee2, Hyungcheol Shin, Jong Duk Lee, Byung-Gook Park, Dong-Won Kim1, Suk-Kang Sung1, Se Hoon Lee1, Byung-Kyu Cho1, Tae-Yong Kim1, Eun Suk Cho1, Jong Jin Lee1, Donggun Park1 ISRC and School of Electrical Engineering and Computer Science, Seoul National University, Seoul, South Korea 1Device Research Team, Semiconductor Research Center, Samsung Electronics Company Limited, Yongin si, Gyeonggi, South Korea 2Department of Electrical Engineering, University of Stanford, Stanford, CA, USA DOI: 10.1109/ICMTS.2006.1614273 HOVER FOR ABSTRACT | PDF Xplore | |
| Impact of emitter resistance mismatch on base and collector current matching in bipolar transistors S. Danaie, A. Perrotin, G. Ghibaudo1, J. . -C. Vildeuil, G. Morin, M. Laurens Central R&D, STMicroelectronics, Crolles, France 1IMEP/CNRS, Grenoble, France DOI: 10.1109/ICMTS.2006.1614295 HOVER FOR ABSTRACT | PDF Xplore | |
| Field-configurable test structure array (FC-TSA): enabling design for monitor, model and manufacturability K. Y. Y. Doong, J. Bordelon1, Keh-Jeng Chang2, L. J. Hung, C. C. Liao, S. C. Lin, R. S. Ho, S. Hsieh, K. L. Young Science-based Industrial Park, Taiwan Semiconductor Manufacturing Corporation, Shin-Chu, Taiwan 1Science-based Industrial Park, Stratosphere Solutions, Inc., Sunnyvale, CA, USA 2Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan DOI: 10.1109/ICMTS.2006.1614283 HOVER FOR ABSTRACT | PDF Xplore | |
| On the passivation of interface states in SONOS test structures: impact of device layout and annealing process F. Driussi, L. Selmi, N. Akil, M. J. van Duuren, R. van Schaijk DIEGM, University of Udine, Udine, Italy DOI: 10.1109/ICMTS.2006.1614274 HOVER FOR ABSTRACT | PDF Xplore | |
| Ring-gate MOSFET test structures for measuring surface-charge-layer sheet resistance on high-resistivity-silicon substrates S. B. Evseev, L. K. Nanver, S. Milosavljevic Laboratory of ECTM, DIMES, Delft University of Technnology, Delft, Netherlands DOI: 10.1109/ICMTS.2006.1614263 HOVER FOR ABSTRACT | PDF Xplore | |
| Impact of pad de-embedding on the extraction of interconnect parameters Sangwook Han, Jooyong Kim, D. P. Neikirk Microelectronics Research Center, Department of Electrical and Computer Engineering, University of Texas, Austin, Austin, TX, USA DOI: 10.1109/ICMTS.2006.1614279 HOVER FOR ABSTRACT | PDF Xplore | |
| A bulk knife-edged as-deposition self-patterning structure for Greek-cross and organic thin film transistors T. Harada, K. Ito, T. Shibata1, Y. Mita School of Electronics Engineering, University of Tokyo, Japan 1School of Frontier Sciences, University of Tokyo, Japan DOI: 10.1109/ICMTS.2006.1614293 HOVER FOR ABSTRACT | PDF Xplore | |
| Test structures and measurement of gate sidewall junction capacitance in MOSFETs N. Hasegawa, S. Yamaura, T. Mori, S. Yamaguchi1 Fujitsu Laboratories Limited, Kawasaki, Japan 1Fujitsu Laboratories Limited, Akiruno, Tokyo, Japan DOI: 10.1109/ICMTS.2006.1614269 HOVER FOR ABSTRACT | PDF Xplore | |
| Characterization of dielectric charging in RF MEMS capacitive switches R. W. Herfst, H. G. A. Huizing, P. G. Steeneken, J. Schmitz1 Philips Research Laboratories, Eindhoven, Netherlands 1MESA Research Institute, Chair of Semiconductor Components, University of Twente, Enschede, Netherlands DOI: 10.1109/ICMTS.2006.1614290 HOVER FOR ABSTRACT | PDF Xplore | |
| Scribe characterization vehicle test chip for ultra fast product wafer yield monitoring C. Hess, A. Inani, Y. Lin, M. Squicciarini, R. Lindley1, N. Akiya PDF Solutions, Inc., San Jose, CA, USA 1PDF Solutions, Inc., San Diego, CA, USA DOI: 10.1109/ICMTS.2006.1614285 HOVER FOR ABSTRACT | PDF Xplore | |
| A 65nm random and systematic yield ramp infrastructure utilizing a specialized addressable array with integrated analysis software M. Karthikeyan, S. Fox, W. Cote, G. Yeric1, M. Hall1, J. Garcia2, B. Mitchell2, E. Wolf3, S. Agarwal1 IBM Systems and Technology Group, Hopewell Junction, NY, USA 1Synopsys, Inc., Austin, TX, USA 2Synopsys, Inc., Dallas, TX, USA 3Synopsys, Inc., Marlborough, MA, USA DOI: 10.1109/ICMTS.2006.1614284 HOVER FOR ABSTRACT | PDF Xplore | |
| A new polysilicon resistor model considering geometry dependent voltage characteristics for the deep sub-micron CMOS process Seok Yong Ko, Jin Soo Kim, Gwang Hyeon Lim, Sung Ki Kim DongbuAnam Semiconductor, Inc., Bouchon, Kyunggi, South Korea DOI: 10.1109/ICMTS.2006.1614268 HOVER FOR ABSTRACT | PDF Xplore | |
| Measurement method for transient programming current of 1T1R phase-change memory K. Kurotsuchi, N. Takaura, N. Matsuzaki, Y. Matsui, O. Tonomura, Y. Fujisaki, N. Kitai1, R. Takemura, K. Osada, S. Hanzawa, H. Moriya, T. Iwasaki, T. Kawahara, M. Terao, M. Matsuoka, M. Moniwa Central Research Laboratory, Hitachi and Limited, Tokyo, Japan 1Hitachi ULSI Systems Company Limited, Tokyo, Japan DOI: 10.1109/ICMTS.2006.1614272 HOVER FOR ABSTRACT | PDF Xplore | |
| Novel test structures for on-chip characterization of coupling capacitance variation by in- and anti-phase crosstalk in multi-level metallization Hi-Deok Lee, Hee-Hwan Ji, In-Sik Han, Han-Soo Joo, Dae-Mann Kim1, Sung-Hyung Park, Heui-Seung Lee, Won-Joon Ho, Dae-Byung Kim, Ihl-Hyun Cho, Sang-Young Kim, Sung-Bo Hwang, Jeong-Gon Lee, Jin-Won Park Department of Elec. Engi, Chungnam National University, Daejeon, South Korea 1Computational Sciences, Korea Institute of Advanced Study, Seoul, South Korea DOI: 10.1109/ICMTS.2006.1614307 HOVER FOR ABSTRACT | PDF Xplore | |
| Test structures for study of electron transport in nickel silicide features with line widths between 40 nm and 160 nm Bin Li, Li Shi, JiPing Zhou1, P. S. Ho1, R. A. Allen, M. W. Cresswell Microelectronics Research Center, University of Texas, Austin, Austin, TX, USA 1NA DOI: 10.1109/ICMTS.2006.1614266 HOVER FOR ABSTRACT | PDF Xplore | |
| Test structure design for measuring electron and hole mobilities at very high injection levels G. D. Licciardo Department of Information and Electrical Engineering, University of Salerno, Fisciano, Italy DOI: 10.1109/ICMTS.2006.1614300 HOVER FOR ABSTRACT | PDF Xplore | |
| Test structures for the characterisation of MEMS and CMOS integration technology H. Lin, A. J. Walton, C. C. Dunarc1, J. T. M. Stevenson, A. M. Gundlach, S. Smith, A. S. Bunting Institute for Integrated Micro and Nano Systems, University of Edinburgh, UK 1Sch. of Eng. & Electron., Edinburgh Univ., UK DOI: 10.1109/ICMTS.2006.1614292 HOVER FOR ABSTRACT | PDF Xplore | |
| Dielectric relaxation characterization and modeling in large frequency and temperature domain: application to 5fF/µm2 Ta2O5 MIM capacitor J. . -P. Manceau, S. Bruyere1, E. Picollet1, M. Minondo1, C. Grundrich1, D. Cottin1, M. Bely1 LEMD (CNRS and UJF), Grenoble, France 1STMicroelectronics Private Limited, Crolles, France DOI: 10.1109/ICMTS.2006.1614303 HOVER FOR ABSTRACT | PDF Xplore | |
| 1/f gate tunneling current noise model of ultrathin oxide MOSFETs F. Martinez, S. Soliveres, C. Leyris, M. Valenza IES-CEM, Universite Montpellier II-UMR CNRS 55, Montpellier, France DOI: 10.1109/ICMTS.2006.1614302 HOVER FOR ABSTRACT | PDF Xplore | |
| Analogue characterization of horizontal bars capacitors for smart power applications Zhenqiu Ning, H. . -X. Delecourt, L. De Schepper, D. Tack, B. Desoete, R. Gillon AMI Semiconductor Belgium bvba, Oudenaarde, Belgium DOI: 10.1109/ICMTS.2006.1614306 HOVER FOR ABSTRACT | PDF Xplore | |
| Characterisation of advanced multilayer de-embedding structures up to 50 GHz incorporating a novel validation standard J. A. O'Sullivan, K. G. McCarthy, P. J. Murphy Department of Electrical and Electronic Engineering, University College Cork, Cork, Ireland DOI: 10.1109/ICMTS.2006.1614276 HOVER FOR ABSTRACT | PDF Xplore | |
| A test structure to separately analyze CMOSFET reliabilities around center and edge along the channel width T. Ohzone, E. Ishii, T. Morishita, K. Komoku, T. Matsuda1, H. Iwata1 Department of Communication Engineering, Okayama Prefectural University, Soja, Okayama, Japan 1Department of Electronics and Informatics, Toyama Prefectural University, Imizu, Toyama, Japan DOI: 10.1109/ICMTS.2006.1614301 HOVER FOR ABSTRACT | PDF Xplore | |
| A comprehensive model to accurately calculate the gate capacitance and the leakage from DC to 100 MHz for ultra thin dielectrics L. Pantisano, J. Ramos, E. San Andres Serrano1, P. J. Roussel, W. Sansen2, G. Groeseneken IMEC, Leuven, Belgium 1Dpto. Fäsica Aplicada III, Fac. Ciencias Fäsicas, Universidad Complutense de Madrid, Madrid, Spain 2KU Leuven ESAT, Leuven, Belgium DOI: 10.1109/ICMTS.2006.1614308 HOVER FOR ABSTRACT | PDF Xplore | |
| High frequency mismatch characterization on 170GHz HBT NPN bipolar device A. Perrotin, D. Gloria, S. Danaie, F. Pourchon, M. Laurens Central R&D, STMicroelectronics, Crolles, France DOI: 10.1109/ICMTS.2006.1614297 HOVER FOR ABSTRACT | PDF Xplore | |
| New test structures for extraction of base sheet resistance in BiCMOS technology C. Raya, F. Pourchon1, D. Celi1, M. Laurens1, T. Zimmer Laboratoire IXL, Université Bordeaux 1, Talence, France 1Central R&D, STMicroelectronics, Crolles, France DOI: 10.1109/ICMTS.2006.1614270 HOVER FOR ABSTRACT | PDF Xplore | |
| -1/+0.8°C error, accurate temperature sensor using 90nm 1V CMOS for on-line thermal monitoring of VLSI circuits M. Sasaki, M. Ikeda, K. Asada VLSI Design and Education Center VDEC, University of Tokyo, Tokyo, Japan DOI: 10.1109/ICMTS.2006.1614264 HOVER FOR ABSTRACT | PDF Xplore | |
| Design and fabrication of a copper test structure for use as an electrical critical dimension reference B. J. R. Shulver, A. S. Bunting, A. M. Gundlach, L. I. Haworth, A. W. S. Ross, A. J. Snell, J. T. M. Stevenson, A. J. Walton, R. A. Allen1, M. W. Cresswell1 Institute for Integrated Micro and Nano Systems, Scottish Microelectronics Centre, University of Edinburgh, Edinburgh, UK 1Semiconductor Electronics Division, National Institute for Standards and Technology, Gaithersburg, MA, USA DOI: 10.1109/ICMTS.2006.1614288 HOVER FOR ABSTRACT | PDF Xplore | |
| Comparison of optical and electrical measurement techniques for CD metrology on alternating aperture phase-shifting masks S. Smith, A. Tsiamis, M. McCallum, A. C. Hourd, J. T. M. Stevenson, A. J. Walton School of Engineering and Electronics, Scottish Microelectronics Centre, University of Edinburgh, Edinburgh, UK DOI: 10.1109/ICMTS.2006.1614287 HOVER FOR ABSTRACT | PDF Xplore | |
| MEMS test structure for measuring thermal conductivity of thin films L. La Spina, N. Nenadovic1, A. W. van Herwaarden2, H. Schellevis, W. H. A. Wien, L. K. Nanver Laboratory of Electronic Components, Technology & Materials,ECTM,DIMES, Delft University of Technnology, Delft, Netherlands 1Philips Semiconductors CTO, Nijmegen, Netherlands 2Xensor Integration, Delft, Netherlands DOI: 10.1109/ICMTS.2006.1614291 HOVER FOR ABSTRACT | PDF Xplore | |
| Specific contact resistance measurements of metal-semiconductor junctions N. Stavitski, M. J. H. van Dal1, R. A. M. Wolters, A. Y. Kovalgin, J. Schmitz MESA Institute for Nanotechnology, University of Twente, Enschede, Netherlands 1Philips Research Leuven, IMEC, Leuven, Belgium DOI: 10.1109/ICMTS.2006.1614265 HOVER FOR ABSTRACT | PDF Xplore | |
| Impact of GHz disturbances on DC parametric measurements H. P. Tuinhout, P. G. M. Baltus1 Philips Research, Eindhoven, Netherlands 1Philips Semiconductors ICRF, Eindhoven, Netherlands DOI: 10.1109/ICMTS.2006.1614278 HOVER FOR ABSTRACT | PDF Xplore |
