IEEE International Conference on Microelectronic Test Structures
ICMTS 1998 Program
1998 Program Booklet
By First Author
| Temperature dependence of the modulation of electrical linewidth of single-crystal critical dimension artifacts R. Allen, O. Oyebanjo, M. W. Cresswell1, L. W. Linholm Semiconductor Electronics Division, National Institute for Standards and Technology, Gaithersburg, MD, USA 1George Washington University, Washington D.C., DC, USA DOI: 10.1109/ICMTS.1998.688037 HOVER FOR ABSTRACT | PDF Xplore | |
| Monitoring of SRAM gate patterns in KrF lithography by ellipsometry H. Arimoto, S. Nakamura, S. Miyata1, K. Nakagawa1 Fujitsu Laboratories Limited, Atsugi, Japan 1Fujitsu Laboratories Limited, Mie, Japan DOI: 10.1109/ICMTS.1998.688036 HOVER FOR ABSTRACT | PDF Xplore | |
| Analysis of a new test pattern for measuring the carrier-carrier scattering mobilities versus injection level in silicon S. Bellone, G. V. Persiano, C. Parrella Dip. di Ingegneria dell' Informazione ed Ingegneria Elettrica, Università di Salerno, Benevento, Italy DOI: 10.1109/ICMTS.1998.688063 HOVER FOR ABSTRACT | PDF Xplore | |
| Study of low frequency noise in scaled down silicon CMOS transistors T. Boutchacha, G. Ghibaudo1, B. Blmekki Algerie and Laboratoire de Physique des Composants à Semiconducteurs, Institute d'ElectrNonique USTO 1CNRS, France DOI: 10.1109/ICMTS.1998.688057 HOVER FOR ABSTRACT | PDF Xplore | |
| Direct extraction of SPICE Gummel-Poon parameters for high frequency modeling J. W. Breti, J. D. Kendall, L. Nathawad1 Gennum Corporation, Burlington, ONT, Canada 1School of Engineering Science, Simon Fraser University, Burnaby, BC, Canada DOI: 10.1109/ICMTS.1998.688047 HOVER FOR ABSTRACT | PDF Xplore | |
| A new characterization method for accurate capacitor matching measurements using pseudo-floating gate test structures in submicron CMOS and BiCMOS technologies O. Roux dit Buisson, G. Morin, F. Paillardet, E. Mazaleyrat SGS-THOMSON Microelectronics, Crolles, France DOI: 10.1109/ICMTS.1998.688096 HOVER FOR ABSTRACT | PDF Xplore | |
| Requirements and challenges for lithography...beyond 193 nm optics J. Canning SEMATECH, Austin, TX, USA DOI: 10.1109/ICMTS.1998.688029 HOVER FOR ABSTRACT | PDF Xplore | |
| Characterization and application of interconnect process parameters A. Chou, K. . -J. Chang1, R. Mathews1, K. Wong1, T. Wang2, Y. . -H. Wei2, K. C. Su3, P. Hsue3 Frequency Technol. Inc., San Jose, CA, USA 1Frequency Technology, Inc., San Jose, CA, USA 2S3, Inc., Santa Clara, CA, USA 3United Microelectronics Corporation Limited, Hsinchu, Taiwan DOI: 10.1109/ICMTS.1998.688066 HOVER FOR ABSTRACT | PDF Xplore | |
| Measurement of '1/f' noise in narrow poly-silicon emitter bipolar transistor structures S. D. Connor Bipolar Characterization Group, Central Research and Development, GEC Plessey Semiconductors Limited, Lancashire, UK DOI: 10.1109/ICMTS.1998.688060 HOVER FOR ABSTRACT | PDF Xplore | |
| Extraction of sheet resistance from four-terminal sheet resistors replicated in monocrystalline films with non-planar geometries M. W. Cresswell, N. M. P. Guillaume1, R. A. Allen, W. F. Guthrie, R. N. Ghoshtagore1, J. C. I. Owen, Z. Osborne, N. Sullivan1, L. W. Linholm National Institute of Standards and Technology, Gaithersburg, MD, US 1NA DOI: 10.1109/ICMTS.1998.688030 HOVER FOR ABSTRACT | PDF Xplore | |
| Using test structures to assess the impact of critical process steps on MOS transistor matching H. Elzinga Philips Semiconductors, Nijmegen, Netherlands DOI: 10.1109/ICMTS.1998.688053 HOVER FOR ABSTRACT | PDF Xplore | |
| New characterization methodology for flash memory cell using CAST structure M. Fan, U. C. Liu, J. C. Guo, M. T. Wang, F. Shone1 Device Department, Macronix International Company Limited, Hsinchu, Taiwan 1Product Development Division II, Macronix International Company Limited, Hsinchu, Taiwan DOI: 10.1109/ICMTS.1998.688052 HOVER FOR ABSTRACT | PDF Xplore | |
| 300 mm evaluation activities in Selete K. Fujiwara Semiconductor Leading Edge Technologies, Inc., Yokohama, Japan DOI: 10.1109/ICMTS.1998.688022 HOVER FOR ABSTRACT | PDF Xplore | |
| A new method for extracting the capacitance coupling coefficients of sub-0.5-µm flash memory cells in the negative gate bias mode K. Haraguchi, H. Kume1, M. Ushiyama1, M. Ohkura1 Central Res. Lab., Hitachi Ltd., Kokubunji, Japan 1CenM Research Laboratory, Hitachi and Limited, Kokubunji, Tokyo, Japan DOI: 10.1109/ICMTS.1998.688100 HOVER FOR ABSTRACT | PDF Xplore | |
| Monitoring method of the tunnel oxide degradation by MOS capacitor H. Hazama Microelectronics Engineering Laboratory, Toshiba Corporation, Yokohama, Japan DOI: 10.1109/ICMTS.1998.688051 HOVER FOR ABSTRACT | PDF Xplore | |
| Strategy to disentangle multiple faults to identify random defects within test structures C. Hess, L. H. Weiland Institute of Computer Design and Fault Tolerance, University of Karlsruhe, Karlsruhe, Germany DOI: 10.1109/ICMTS.1998.688058 HOVER FOR ABSTRACT | PDF Xplore | |
| Wafer level defect density distribution using checkerboard test structures C. Hess, L. H. Weiland Institute of Computer Design and Fault Tolerance, University of Karlsruhe, Karlsruhe, Germany DOI: 10.1109/ICMTS.1998.688050 HOVER FOR ABSTRACT | PDF Xplore | |
| A new direct extraction algorithm for intrinsic Gummel-Poon BJT model parameters F. Ingvarson, K. O. Jeppson Department of Solid State Electronics, Chalmers University of Technology, Goteborg, Sweden DOI: 10.1109/ICMTS.1998.688061 HOVER FOR ABSTRACT | PDF Xplore | |
| Prediction of AC performance of double-polysilicon bipolar transistors from e-test parameters: An experiment S. C. Kelly, E. C. Griffith, J. A. Power, M. O'Neill1 Analog Devices, Raheen Industrial Estate, Limerick, Ireland 1NA DOI: 10.1109/ICMTS.1998.688059 HOVER FOR ABSTRACT | PDF Xplore | |
| Advanced characterization method for sub-micron DRAM cell transistors I. Kurachi Process Technology Center, OKI Electric Industry Company Limited, Hachioji, Tokyo, Japan DOI: 10.1109/ICMTS.1998.688048 HOVER FOR ABSTRACT | PDF Xplore | |
| On the use of test structures for the electro-mechanical characterization of a CMOS compatible MEMS technology L. Latorre, Y. Bertrand, P. Nouet Laboratoire dlnformatique, Universite Montpellier, Montpellier, France DOI: 10.1109/ICMTS.1998.688064 HOVER FOR ABSTRACT | PDF Xplore | |
| A novel method for base and emitter resistance extraction in bipolar junction transistors from static and low frequency noise measurements P. Llinares, G. Ghibaudo1, N. Gambetta2, Y. Mourier3, A. Monroy2, G. Lecoy3, J. A. Chroboczek France Telecom, éCentre National d Etudes Télélcommunications, Meylan, France 1URA-CNRS, Laborsitoire Physique Composants à Semiconducteurs, Grenoble, France 2SGS-THOMSON Microelectronics, Crolles, France 3USTL, Centre d''Electronique Montpellier II, Montpellier, France DOI: 10.1109/ICMTS.1998.688043 HOVER FOR ABSTRACT | PDF Xplore | |
| Test structures for MCM-D technology characterization M. Lozano, J. Santander, E. Cabruja, C. Perello, M. Ullan, E. Lora-Tamayo Centro Nacional de Microelectrtònica, Campus Universidad Autónoma de Barcelona, Barcelona, Spain DOI: 10.1109/ICMTS.1998.688065 HOVER FOR ABSTRACT | PDF Xplore | |
 | Detailed observation of small leak current in flash memories with thin tunnel oxides Y. Manabe, K. Okuyama1, K. Kubota1, A. Nozoe2, T. Karashima1, K. Ujiie3, H. Kanno3, M. Nakashima4, N. Ajika5 Hitachi Ltd, Tokyo, Japan 1Semiconductor & Integrated Circuits Div, Hitachi and Limited, Kodaira, Tokyo, Japan 2Device Development Center, Hitachi and Limited, Tokyo, Japan 3Hitachi ULSI Engineering Corporation, Tokyo, Japan 4Semiconductor Group Manufacturing Technology Div, Mitsubishi Electric Corporation Limited, Hyogo, Japan 5Mitsubishi Electric Corporation, ULSI Laboratory, Hyogo, Japan DOI: 10.1109/ICMTS.1998.688049 HOVER FOR ABSTRACT | PDF Xplore |
| Extraction of the Si-SiO2 interface trap layer parameters in MOS transistors using a new charge pumping analysis Y. Maneglia, D. Bauza LPCS, ENSERGDNPG, Grenoble, France DOI: 10.1109/ICMTS.1998.688069 HOVER FOR ABSTRACT | PDF Xplore | |
| Statistical characterization of 0.18 µm low-power CMOS process using efficient parameter extraction K. G. McCarthy, E. V. Saavedra Diaz, D. B. M. Klaassen, A. Mathewson National Microelectronics Research Centre, Cork, Ireland DOI: 10.1109/ICMTS.1998.688055 HOVER FOR ABSTRACT | PDF Xplore | |
| Test structure for characterizing capacitance matrix of multi-layer interconnections in VLSI T. Mido, H. Ito, K. Asada Department of Electronic Engineering, University of Tokyo, Bunkyo, Tokyo, Japan DOI: 10.1109/ICMTS.1998.688090 HOVER FOR ABSTRACT | PDF Xplore | |
| Benchmark methodology of interconnect capacitance simulation using inter-digitated capacitors O. S. Nakagawa, S. . -Y. Oh, T. Hsu, S. Habu1 Hewlett-Packard Laboratories, ULSI Research Laboratories, Palo Alto, CA, USA 1Hachioji Semiconductor Test Division, Hewlett Packard Company, Tokyo, Japan DOI: 10.1109/ICMTS.1998.688103 HOVER FOR ABSTRACT | PDF Xplore | |
| An analysis of hot-carrier-induced photoemission profiles in n-MOSFETs T. Ohzone, N. Matsuyama, N. Hosoi1, T. Matsuda Department of Electronics and Informatics, Toyama Prefectural University, Toyama, Japan 1NA DOI: 10.1109/ICMTS.1998.688084 HOVER FOR ABSTRACT | PDF Xplore | |
| Electrical characteristics of 0°/±45°/90°-orientation CMOSFET with source/drain fabricated by various ion-implantation methods T. Ohzone, M. Okina, T. Matsuda Department of Electronics and Informatics, Toyama Prefectural University, Toyama, Japan DOI: 10.1109/ICMTS.1998.688056 HOVER FOR ABSTRACT | PDF Xplore | |
| New method for monitoring of analogue processes-evaluation of the impact of metalisation on the performance of precise analogue resistors A. Pergoot, P. Cox, P. Vercruysse, I. Wuyts, P. Raes Alcatel Mietec, Oudenaarde, Belgium DOI: 10.1109/ICMTS.1998.688026 HOVER FOR ABSTRACT | PDF Xplore | |
| A high density integrated test matrix of MOS transistors for matching study L. Portmann, C. Lallement1, F. Krummenacher Electronics Laboratory, Swiss Federal Institute of Technology, Lausanne, Switzerland 1ENSPT, ERM-PHASE, Illkirch-Graffenstaden, France DOI: 10.1109/ICMTS.1998.688028 HOVER FOR ABSTRACT | PDF Xplore | |
| A new method for electrical extraction of spacer width, poly sheet resistance, and poly CD in salicide process G. A. Rezvani, S. Bothra1, X. . -W. Lin1, A. Ho1 VLSI Technol. Inc., San Jose, CA, USA 1Technology Development Department, VLSI Technology, Inc., CA, USA DOI: 10.1109/ICMTS.1998.688034 HOVER FOR ABSTRACT | PDF Xplore | |
| The influence of SiN films on negative bias temperature instability and characteristics in MOSFET's K. Sasada, M. Arimoto, H. Nagasawa, A. Nishida, H. Aoe, T. Dan, S. Fujiwara, Y. Matsushita, K. Yodoshi Microelectronics Research Center, SANYO Electric Company Limited, Gifu, Japan DOI: 10.1109/ICMTS.1998.688072 HOVER FOR ABSTRACT | PDF Xplore | |
| A novel unified transient enhanced diffusion model on the basis of RSF with process database H. Sato, K. Tsuneno, H. Masuda Device Development Center, Hitachi and Limited, Ome, Tokyo, Japan DOI: 10.1109/ICMTS.1998.688067 HOVER FOR ABSTRACT | PDF Xplore | |
| Anomalous geometry dependence of source/drain resistance in narrow-width MOSFETs A. J. Scholten, D. B. M. Klaassen Philips Research Laboratories, Eindhoven, Netherlands DOI: 10.1109/ICMTS.1998.688046 HOVER FOR ABSTRACT | PDF Xplore | |
| A new test structure for evaluation of extrinsic oxide breakdown K. Shiga, J. Komori, M. Katsumata, A. Teramoto, M. Sekine ULSI LaboratoryEvaluation Analysis Center, Mitsubishi Electric Corporation Limited, Itami, Hyogo, Japan DOI: 10.1109/ICMTS.1998.688068 HOVER FOR ABSTRACT | PDF Xplore | |
| Evaluation of the scaling limit of a narrow U-groove isolation structure by using test structures Y. Tamaki, T. Hashimoto Device Development Center, Hitachi and Limited, Ome, Tokyo, Japan DOI: 10.1109/ICMTS.1998.688045 HOVER FOR ABSTRACT | PDF Xplore | |
| Measurement of lithographical proximity effects on matching of bipolar transistors H. P. Tuinhout, W. C. M. Peters1 Philips Research Laboratory, Netherlands 1Philips Semiconductors Nijmegen, Netherlands DOI: 10.1109/ICMTS.1998.688025 HOVER FOR ABSTRACT | PDF Xplore | |
| A prediction method of oxide breakdown caused by defects in SiO2 films H. Uchida, N. Hirashita VLSI Research and Development Center, OKI Electric Industry Company Limited, Hachioji, Tokyo, Japan DOI: 10.1109/ICMTS.1998.688062 HOVER FOR ABSTRACT | PDF Xplore | |
| Current status and issues of X-ray mask S. Uchiyama NTT Systems Electronics Laboratories, Atsugi, Kanagawa, Japan DOI: 10.1109/ICMTS.1998.688038 HOVER FOR ABSTRACT | PDF Xplore | |
| Test structures to characterise a novel circuit fabrication technique that uses offset lithography A. J. Walton, J. T. M. Stevenson, M. Fallon1, P. S. A. Evans2, B. J. Ramsey2, D. Harrison2 Department of Electrical Engineering, University of Edinburgh, Edinburgh, UK 1National Semiconductor Larkfield Industrial Estate, Greenock, UK 2Department of Design, Brunei University, Egham, Surrey, UK DOI: 10.1109/ICMTS.1998.688032 HOVER FOR ABSTRACT | PDF Xplore | |
| A new variational method to determine effective channel length and series resistance of MOSFET's K. Yamaguchi, H. Amishiro, M. Yamawaki, S. Asai ULSI Laboratory, Mitsubishi Electric Corporation, Itami, Hyogo, Japan DOI: 10.1109/ICMTS.1998.688054 HOVER FOR ABSTRACT | PDF Xplore |
