IEEE International Conference on Microelectronic Test Structures
ICMTS 2009 Program
2009 Program Booklet
By First Author
| S-Parameter-Based Modal Decomposition of Multiconductor Transmission Lines and Its Application to De-Embedding S. Amakawa, K. Yamanaga, H. Ito1, T. Sato, N. Ishihara, K. Masu2 Integrated Research Institute, Tokyo Institute of Technology, Japan 1Precision and Intelligence Laboratory, Tokyo Institute of Technology, Japan 2Tokyo Kogyo Daigaku, Meguro-ku, Tokyo, JP DOI: 10.1109/ICMTS.2009.4814635 HOVER FOR ABSTRACT | PDF Xplore | |
| Metal and Dielectric Thickness: a Comprehensive Methodology for Back-End Electrical Characterization L. Bortesi, L. Vendrame Numonyx, Research and Development Technology Development, Agrate-Brianza, Italy DOI: 10.1109/ICMTS.2009.4814640 HOVER FOR ABSTRACT | PDF Xplore | |
| Efficient Characterization Methodology of Gate-Bulk Leakage and Capacitance for Ultra-Thin Oxide Partially-Depleted (PD) SOI Floating Body CMOS D. Chen, R. Lee, Y. C. Liu, G. S. Lin, M. C. Tang, M. F. Wang, C. S. Yeh, S. C. Chien Advanced Technology Development Division, United Microelectronics Corporation Limited, Hsinchu, Taiwan DOI: 10.1109/ICMTS.2009.4814626 HOVER FOR ABSTRACT | PDF Xplore | |
| Practical Considerations for Measurements of Test Structures for Dielectric Characterization W. Chen, K. G. McCarthy, A. Mathewson Tyndall National Institute and Department of Electrical & Electronic Engineering, University College Cork, Ireland DOI: 10.1109/ICMTS.2009.4814646 HOVER FOR ABSTRACT | PDF Xplore | |
| Mapping the Edge Roughness of Test-Structure Features for Nanometer-Level CD Reference-Materials M. W. Cresswell, M. Davidson, G. I. Mijares, R. A. Allen, J. Geist, M. Bishop1 Semiconductor Electronics Division, Electronics and Electrical Engineering Laboratory, National Institute for Standards and Technology, Gaithersburg, MD, USA 1International Sematech, Austin, TX, USA DOI: 10.1109/ICMTS.2009.4814633 HOVER FOR ABSTRACT | PDF Xplore | |
| 4K-cells Resistive and Charge-Base-Capacitive Measurement Test Structure Array (R-CBCM-TSA) for CMOS Logic Process Development, Monitor and Model K. Y. Y. Doong, K. -J. Chang1, S. . -C. Lin, H. C. Tseng, A. Dagonis, S. Pan Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan 1Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan DOI: 10.1109/ICMTS.2009.4814645 HOVER FOR ABSTRACT | PDF Xplore | |
| Test Structure Design, Extraction, and Impact Study of FEOL Capacitance Parameters in Advanced 45nm Technology S. Ekbote, P. Sadagopan, Y. Chen, W. Sy, R. Zhang, M. Han QUALCOMM, Inc.orporated, San Diego, CA, USA DOI: 10.1109/ICMTS.2009.4814647 HOVER FOR ABSTRACT | PDF Xplore | |
| Accurate Time Constant of Random Telegraph Signal Extracted by a Sufficient Long Time Measurement in Very Large-Scale Array TEG T. Fujisawa, K. Abe, S. Watabe, N. Miyamoto1, A. Teramoto1, S. Sugawa, T. Ohmi1 Graduate School of Engineering, University of Tohoku, Sendai, Japan 1New Industry Creation Hatchery Center, University of Tohoku, Sendai, Japan DOI: 10.1109/ICMTS.2009.4814601 HOVER FOR ABSTRACT | PDF Xplore | |
| Characterization and Model Parameter Extraction of Symmetrical Centre Tapped Inductor using Build in Mixed Mode and Pure Differential S-Parameters F. Gianesello, Y. Morandini, S. Boret, D. Gloria Technology R&D, STMicroelectronics, Crolles, France DOI: 10.1109/ICMTS.2009.4814636 HOVER FOR ABSTRACT | PDF Xplore | |
 | Four point probe structures with buried electrodes for the electrical characterization of ultrathin conducting films A. W. Groenland, R. A. M. Wolters1, A. Y. Kovalgin, J. Schmitz MESA Institute of Nanotechnology, Semiconductor Components, University of Twente, Enschede, Netherlands 1NXP-TMSC Research Center, Eindhoven, Netherlands DOI: 10.1109/ICMTS.2009.4814639 HOVER FOR ABSTRACT | PDF Xplore |
| Array Test Structure for Ultra-Thin Gate Oxide Degradation Issues K. M. Hafkemeyer, A. Domdey, D. Schroeder, W. H. Krautschneider Institute of Nanoelectronics, Hamburg University of Technology, Hamburg, Germany DOI: 10.1109/ICMTS.2009.4814616 HOVER FOR ABSTRACT | PDF Xplore | |
| Advanced Method for Measuring Ultra-Low Contact Resistivity Between Silicide and Silicon Based on Cross Bridge Kelvin Resistor T. Isogai, H. Tanaka1, A. Teramoto1, T. Goto1, S. Sugawa, T. Ohmi2 Graduate School of Engineering, University of Tohoku, Japan 1New Industry Creation Hatchery Center, University of Tohoku, Japan 2WPI Research Center, University of Tohoku, Japan DOI: 10.1109/ICMTS.2009.4814621 HOVER FOR ABSTRACT | PDF Xplore | |
| Test Structures Utilizing High-Precision Fast Testing For 32nm Yield Enhancement M. Karthikeyan, L. Medina, E. Shiling IBM Systems and Technology Group, Hopewell Junction, NY, USA DOI: 10.1109/ICMTS.2009.4814624 HOVER FOR ABSTRACT | PDF Xplore | |
| Addressable Arrays Implemented with One Metal Level for MOSFET and Resistor Variability Characterization M. B. Ketchen, M. Bhushan1, G. Costrini IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA 1IBM Systems and Technology Group, Hopewell Junction, NY, USA DOI: 10.1109/ICMTS.2009.4814600 HOVER FOR ABSTRACT | PDF Xplore | |
| Test Chip to Evaluate Measurement Methods for Small Capacitances J. J. Kopanski, M. Y. Afridi, C. Jiang1, C. A. Richter Semiconductor Electronics Division, National Institute for Standards and Technology, Gaithersburg, MD, USA 1University of Illinois, Urbana-Champaign, Champaign, USA DOI: 10.1109/ICMTS.2009.4814606 HOVER FOR ABSTRACT | PDF Xplore | |
| A Test Structure for Assessing Individual Contact Resistance F. Liu, K. Agarwal IBM Austin Research Laboratory, Austin, TX, USA DOI: 10.1109/ICMTS.2009.4814641 HOVER FOR ABSTRACT | PDF Xplore | |
| Test Structure to Extract Circuit Models of Nanostructures Operating at High Frequencies F. R. Madriz, J. R. Jameson, S. Krishnan, X. Sun, C. Y. Yang Center of Nanostructures, Santa Clara University, Santa Clara, CA, USA DOI: 10.1109/ICMTS.2009.4814605 HOVER FOR ABSTRACT | PDF Xplore | |
| A Test Structure for Spectrum Analysis of Hot-Carrier-Induced Photoemission from Scaled MOSFETs under DC and AC Operation T. Matsuda, T. Maezawa, H. Iwata, T. Ohzone1 Department of Information Systems Engineering, Toyama Prefectural University, Imizu, Toyama, Japan 1Dawn Enterprise, Nagoya, Japan DOI: 10.1109/ICMTS.2009.4814613 HOVER FOR ABSTRACT | PDF Xplore | |
| An Analysis of Temperature Impact on MOSFET Mismatch S. Mennillo, A. Spessot, L. Vendrame, L. Bortesi Research and Development-Technology Development, Numonyx, Agrate-Brianza, Italy DOI: 10.1109/ICMTS.2009.4814610 HOVER FOR ABSTRACT | PDF Xplore | |
| Mismatch Measure Improvement Using Kelvin Test Structures in Transistor Pair Configuration in Sub-Hundred Nanometer MOSFET Technology C. M. Mezzomo, M. Marin, C. Leyris, G. Ghibaudo1 STMicroelectronics, Crolles, France 1Minatec, IMEP-LAHC GRENOBLE, Grenoble, France DOI: 10.1109/ICMTS.2009.4814611 HOVER FOR ABSTRACT | PDF Xplore | |
| Benefit of Direct Charge Measurement (DCM) on Interconnect Capacitance Measurement Y. Miyake, M. Goto Agilent Technologies International Japan Limited, Hachioji, Japan DOI: 10.1109/ICMTS.2009.4814644 HOVER FOR ABSTRACT | PDF Xplore | |
| Static Noise Margin Evaluation Method Based on Direct Polynomial-Curve-Fitting with Universal SRAM Cell Inverter TEG Measurement K. Nakamura, K. Noda, H. Koike1 Center of Microelectronic Systems, Kyushu Institute of Technology, Fukuoka, Japan 1Fukuoka Industry Science and Technology Foundation, Fukuoka, Japan DOI: 10.1109/ICMTS.2009.4814599 HOVER FOR ABSTRACT | PDF Xplore | |
| An enhanced model for thin film resistor matching T. G. O'Dwyer, M. P. Kennedy1 Analog Devices Inc.orporated, Wilmington, MA, USA 1Department of Microelectronic Engineering, University College Cork, Cork, Ireland DOI: 10.1109/ICMTS.2009.4814608 HOVER FOR ABSTRACT | PDF Xplore | |
| Test Structure for High-Voltage LD-MOSFET Mismatch Characterization in 0.35 um HV-CMOS Technology W. Posch, C. Murhammer, E. Seebacher Austria Microsystems AG, Unterpremstatten, Austria DOI: 10.1109/ICMTS.2009.4814618 HOVER FOR ABSTRACT | PDF Xplore | |
| Fast Embedded Characterization of FEOL Variations in MOS Devices F. Rigaud, J. M. Portal, P. Dreux1, J. Vast1, H. Aziza, G. Bas1 IM2NP-Laboratoire Mat érioux et Micro éelectronique de Provence, IMT-Technopôle de Château Gombert, UMR CNRS 6242, Marseilles, France 1STMicroelectronics, Rousset, France DOI: 10.1109/ICMTS.2009.4814642 HOVER FOR ABSTRACT | PDF Xplore | |
| Nanomechanical test structure for optimal alignment in stencil-based lithography M. Sansa, J. Arcamone, J. Verd1, A. Uranga1, G. Abadal, E. Lora-Tamayo, N. Barniol1, M. A. F. van den Boogaart2, V. Savu2, J. Brugger2, F. Perez-Murano Instituto de Microelectronica de Barcelona CNM-IMB (CSIC), Campus UAB, Bellaterra (Barcelona), Spain 1Dept.Electronics Engineering, Universitat Autonoma de Barcelona, ETSE-UAB, Bellaterra (Barcelona), Spain 2Microsystems Laboratory (LMISl), EPFL, EPFL, Lausanne, Switzerland DOI: 10.1109/ICMTS.2009.4814631 HOVER FOR ABSTRACT | PDF Xplore | |
| Estimating MOSFET Leakage from Low-cost, Low-resolution Fast Parametric Test S. Saxena, T. Uezono, R. Vallishayee1, R. Lindley, A. Swimmer, S. Winters PDF Solutions, Incorporated, Richardson, TX, USA 1PDF Solutions, Incorporated, San Jose, CA, USA DOI: 10.1109/ICMTS.2009.4814623 HOVER FOR ABSTRACT | PDF Xplore | |
| Application of a Micromechanical Test Structure to the Measurement of Stress in an Electroplated Permalloy Film S. Smith, N. L. Brockie, J. G. Terry, N. Wang, A. B. Horsfall1, A. J. Walton Institute of Integrated Micro and Nano Systems, School of Engineering, Scottish Microelectronics Centre, University of Edinburgh, UK 1School of Electrical, Electronic and Computer Engineering, Merz Court, University of Newcastle, Newcastle-upon-Tyne, UK DOI: 10.1109/ICMTS.2009.4814614 HOVER FOR ABSTRACT | PDF Xplore | |
| Application of Matching Structures to Identify the Source of Systematic Dimensional Offsets in GHOST Proximity Corrected Photomasks S. Smith, A. Tsiamis, M. McCallum1, A. C. Hourd2, J. T. M. Stevenson, A. J. Walton Institute of Integrated Micro and Nano Systems, School of Engineering, Scottish Microelectronics Centre, University of Edinburgh, UK 1Nikon Precision Europe GmbH, Livingston, UK 2Eastfield Industrial Estate, Compugraphics International Limited, Glenrothes, Fife, UK DOI: 10.1109/ICMTS.2009.4814609 HOVER FOR ABSTRACT | PDF Xplore | |
| Characterization and modeling of mechanical stress in silicon-based devices A. Spessot, A. Colombi, G. P. Carnevale, P. Fantini Numonyx Research and Development-Technology development, Agrate-Brianza, Italy DOI: 10.1109/ICMTS.2009.4814628 HOVER FOR ABSTRACT | PDF Xplore | |
| | Non-Contact, Pad-less Measurement Technology and Test Structures for Characterization of Cross-Wafer and In-Die Product Variability G. Steinbrueck, J. S. Vickers, M. Babazadeh, M. M. Pelella, N. Pakdaman Tau-Metrix, Inc., Santa Clara, CA, USA DOI: 10.1109/ICMTS.2009.4814617 HOVER FOR ABSTRACT | PDF Xplore |
| In-Situ Silicon Integrated Tuner for Automated On-Wafer MMW Noise Parameters Extraction using Multi-Impedance Method for Transistor Characterization Y. Tagro, D. Gloria1, S. Boret1, Y. Morandini1, G. Dambrine Institut d'Electronique, de Microélectronique et de Nanotechnologie, IEMN, Villeneuve d'Ascq, France 1Technology Research and Development-TPS, STMicroelectronics, Crolles, France DOI: 10.1109/ICMTS.2009.4814637 HOVER FOR ABSTRACT | PDF Xplore | |
| Electrical Test Structures for Investigating the Effects of Optical Proximity Correction A. Tsiamis, S. Smith, M. McCallum1, A. C. Hourd2, J. T. M. Stevenson, A. J. Walton Institute of Integrated Micro and Nano Systems, School of Engineering, Scottish Microelectronics Centre, University of Edinburgh, Edinburgh, UK 1Nikon Precision Europe GmbH, West Lothian, UK 2Compugraphics International Limited, Glenrothes, Fife, UK DOI: 10.1109/ICMTS.2009.4814632 HOVER FOR ABSTRACT | PDF Xplore | |
| Measurement of MOSFET C-V Curve Variation Using CBCM Method K. Tsuji, K. Terada, T. Nakamoto, T. Tsunomura1, A. Nishida1 Graduate School of Information Sciences, Hiroshima City University, Asaminami, Hiroshima, Japan 1MIRAI-Selete, Tsukuba, Ibaraki, Japan DOI: 10.1109/ICMTS.2009.4814615 HOVER FOR ABSTRACT | PDF Xplore | |
| High precision on-wafer backend capacitor mismatch measurements using a benchtop semiconductor characterization system H. Tuinhout, F. van Rossem, N. Wils NXP Semiconductors Research, Eindhoven, Netherlands DOI: 10.1109/ICMTS.2009.4814598 HOVER FOR ABSTRACT | PDF Xplore | |
| A Test Structure for Statistical Evaluation of Characteristics Variability in a Very Large Number of MOSFETs S. Watabe, S. Sugawa, K. Abe, T. Fujisawa, N. Miyamoto1, A. Teramoto1, T. Ohmi2 Graduate School of Engineering, University of Tohoku, Sendai, Japan 1New Industry Creation Hatchery Center, University of Tohoku, Sendai, Japan 2WPI Research center, University of Tohoku, Sendai, Japan DOI: 10.1109/ICMTS.2009.4814622 HOVER FOR ABSTRACT | PDF Xplore | |
| Demonstration of a Sub-micron Damascene Cu/Low-k Mechanical Sensor to Monitor Stress in BEOL Metallization C. J. Wilson, K. Croes, Z. Tokei, G. P. Beyer, A. B. Horsfall1, A. G. O'Neill1 IMEC vzw, Leuven, Belgium 1School of Electrical, Electronic, and Computer Engineering, University of Newcastle, Newcastle-upon-Tyne, UK DOI: 10.1109/ICMTS.2009.4814604 HOVER FOR ABSTRACT | PDF Xplore | |
| Extracting Resistances of Carbon Nanostructures in Vias W. Wu, S. Krishnan, K. Li, X. Sun, R. Wu, T. Yamada, C. Y. Yang Center of Nanostructures, Santa Clara University, Santa Clara, CA, USA DOI: 10.1109/ICMTS.2009.4814603 HOVER FOR ABSTRACT | PDF Xplore | |
| Parameter extraction for the PSP MOSFET model by the combination of genetic and Levenberg-Marquardt algorithms Q. Zhou, W. Yao, W. Wu, X. Li, Z. Zhu, G. Gildenblat Ira A. Fulton School of Engineering, Department of Electrical Engineering, Arizona State University, Tempe, AZ, USA DOI: 10.1109/ICMTS.2009.4814627 HOVER FOR ABSTRACT | PDF Xplore | |
| Improved Parameter Extraction Procedure for PSP-Based MOS Varactor Model Z. Zhu, J. Victory1, S. Chaudhry2, L. Dong2, Z. Yan2, J. Zheng2, W. Wu, X. Li, Q. Zhou, P. Kolev3, C. C. McAndrew, G. Gildenblat Department of Electrical Engineering, Arizona State University, Tempe, AZ, USA 1Sentinel IC Technologies, Irvine, CA, USA 2Jazz Semiconductor, Newport Beach, CA, USA 3RFMD, Inc., San Diego, CA, USA DOI: 10.1109/ICMTS.2009.4814629 HOVER FOR ABSTRACT | PDF Xplore | |
| Automated Test Structure Generation for Characterizing Plasma Induced Damage in MOSFET D vices T. Zwingman, A. Gabrys, A. J. West National Semiconductor Corporation, Santa Clara, CA, USA DOI: 10.1109/ICMTS.2009.4814619 HOVER FOR ABSTRACT | PDF Xplore |
