IEEE International Conference on Microelectronic Test Structures
ICMTS 2002 Program
2002 Program Booklet
By First Author
| Test structures for referencing electrical linewidth measurements to silicon lattice parameters using HRTEM R. A. Allen, M. W. Cresswell, C. E. Murabito, W. F. Guthrie, L. W. Linholm, C. H. Ellenwood, E. Hal Bogardus1 Semiconductor Electronics Division, National Institute of Standards and Technology, Gaithersburg, Maryland, USA 1Intemational SEMATECH, Austin, Texas, USA DOI: 10.1109/ICMTS.2002.1193163 HOVER FOR ABSTRACT | PDF Xplore | |
| Verification structures for transmission line pulse measurements R. A. Ashton Agere Systems, Orlando, FL, USA DOI: 10.1109/ICMTS.2002.1193191 HOVER FOR ABSTRACT | PDF Xplore | |
| Test structures for analyzing radiation effects in bipolar technologies H. J. Barnaby, R. D. Schrimpf1, K. F. Galloway1, D. R. Ball1, R. L. Pease2, P. Fouillat3 Electrical & Computer Engineering Department, University of Arizona Tucson, Tucson, AZ, USA 1Electrical Engineering & Computer Science Department, Vanderbilt University, Nashville, TN, USA 2RLP Research, Inc., Albuquerque, NM, USA 3University of Bordeaux 1, Bordeaux, France DOI: 10.1109/ICMTS.2002.1193196 HOVER FOR ABSTRACT | PDF Xplore | |
| Triple-junction colour sensor fully compatible with CMOS technology: results of a test chip G. . -F. Dalla Betta, N. Zorzi, P. Bellutti, M. Boscardin, G. Soncini Divisione Microsistemi, ITC IRST, Trento, Italy DOI: 10.1109/ICMTS.2002.1193199 HOVER FOR ABSTRACT | PDF Xplore | |
| Characterisation of microfluidic devices D. C. S. Bien, S. J. N. Mitchell, H. S. Gamble School of Electrical and Electronic Engineering, Queen's University, Belfast, UK DOI: 10.1109/ICMTS.2002.1193198 HOVER FOR ABSTRACT | PDF Xplore | |
| High frequency test structures definition for electromagnetic coupling study between two symmetrical inductors. Electrical modelling of the whole coupling between coils C. Clement, B. Van Haaren, D. Gloria Central Research & Development, STMicroelectronics, Crolles, France DOI: 10.1109/ICMTS.2002.1193166 HOVER FOR ABSTRACT | PDF Xplore | |
| A comparison of extraction techniques for threshold voltage mismatch J. A. Croon, H. P. Tuinhout1, R. Difrenza2, J. Knol3, A. J. Moonen3, S. Decoutere, H. E. Maes, W. Sansen4 IMEC vzw, Leuven, Belgium 1Philips Research, The Netherlands 2LPCS, ENSERG, Grenoble, France 3Philips Semiconductors, Nijmegen, The Netherlands 4K.U. Leuven, ESAT, Leuven, Belgium DOI: 10.1109/ICMTS.2002.1193202 HOVER FOR ABSTRACT | PDF Xplore | |
| Comparison between matching parameters and fluctuations at the wafer level R. Difrenza, P. Llinares1, S. Taupin1, R. Palla1, C. Garnier1, G. Ghibaudo LPCS, ENSERG, Grenoble, France 1Central R&D, STMicroelectronics, Crolles, France DOI: 10.1109/ICMTS.2002.1193203 HOVER FOR ABSTRACT | PDF Xplore | |
| An assessment of physical and electrical design rule based statistical process monitoring and modeling (PEDR-SPMM): for foundry manufacturing line of multiple-product mixed-run K. Y. . -Y. Doong, S. Hsieh1, S. C. Lin1, L. J. Hung1, R. J. Wang1, Binson Shen1, J. W. Hisa1, J. C. Guo1, I. C. Chen1, K. L. Young1, C. C. . -H. Hsu Microelectronics Laboratory, Semiconductor Technology & Application Research (STAR) Group, Department of Electrical Engineering, National Tsing Hua University, Taiwan 1Taiwan Semiconductor Manufacturing Corporation, Hsinchu, Taiwan DOI: 10.1109/ICMTS.2002.1193171 HOVER FOR ABSTRACT | PDF Xplore | |
| A consistent and scalable PSPICE HFET-Model for DC- and S-parameter-simulation S. Ehrich, R. M. Bertenburg1, M. Agethen1, A. Brennemann1, W. Brockerhoff, F. . -J. Tegude Solid-State Electronics Department, Gerhard-Mercator-University Duisburg, Duisburg, Germany 1IPAG, Duisburg, Germany DOI: 10.1109/ICMTS.2002.1193173 HOVER FOR ABSTRACT | PDF Xplore | |
| Direct measurement of field transistor threshold voltages using inversion layer fed transistors in deep submicron processes J. N. Ellis Zarlink Semiconductor Limited, Plymouth, Devon, UK DOI: 10.1109/ICMTS.2002.1193192 HOVER FOR ABSTRACT | PDF Xplore | |
| Measurement of the linewidth of electrical test-structure reference features by automated phase-contrast image analysis B. A. am Ende, M. W. Cresswell, R. A. Allen, T. J. Headley1, W. F. Guthrie2, L. W. Linholm, E. H. Bogardus3, C. E. Murabito2 Semiconductor Electronics Division, National Institute of Standards and Technology, USA 1Sandia National Laboratories, USA 2Semiconductor Electronics Division, National Institute of Standards and Technology 3International SEMATECH, USA DOI: 10.1109/ICMTS.2002.1193161 HOVER FOR ABSTRACT | PDF Xplore | |
| A new test structure and characterization methodology to identify array leakage path in Mask ROM T. Fan, K. Y. Chan, T. C. Lu, S. Pan Special Device / Modeling Dept., Macronix International Co. Ltd., Hsinchu, Taiwan, R.O.C. DOI: 10.1109/ICMTS.2002.1193169 HOVER FOR ABSTRACT | PDF Xplore | |
| New spider-webs test structure and characterization methodology for flash memory tunnel oxide quality T. H. Fan, T. C. Lu, S. Pan Special Device /Modeling Dept, Macronix International Company Limited, Hsinchu, Taiwan DOI: 10.1109/ICMTS.2002.1193185 HOVER FOR ABSTRACT | PDF Xplore | |
| Extraction method for substrate resistance of RF MOSFETs Jeonghu Han, Minkyu Je, Hyungcheol Shin Department of EECS, KAIST, Taejon, South Korea DOI: 10.1109/ICMTS.2002.1193167 HOVER FOR ABSTRACT | PDF Xplore | |
| Systematic mismatch in diffusion resistors caused by photolithography S. Hausser, S. Majoni, H. Schligtenhorst, G. Kolwe Philips Semiconductors GmbH, Boeblingen, Germany DOI: 10.1109/ICMTS.2002.1193204 HOVER FOR ABSTRACT | PDF Xplore | |
| Impact of probe configuration and calibration techniques on quality factor determination of on-wafer inductors for GHz applications R. J. Havens, L. F. Tiemeijer, L. Garnbus1 Philips Research Laboratories, Eindhoven, The Netherlands 1NA DOI: 10.1109/ICMTS.2002.1193164 HOVER FOR ABSTRACT | PDF Xplore | |
| Logic characterization vehicle to determine process variation impact on yield and performance of digital circuits C. Hess, B. E. Stine, L. H. Weiland, K. Sawada1 PDF Solutions, Inc.orporated, San Jose, CA, USA 1Toshiba Corporation, Kawasaki, Japan DOI: 10.1109/ICMTS.2002.1193195 HOVER FOR ABSTRACT | PDF Xplore | |
| Passive multiplexer test structure for fast and accurate contact and via fail rate evaluation C. Hess, B. E. Stine, L. H. Weiland, T. Mitchell1, M. Karnett2, K. Gardner1 Philips Semiconductor, San Antonio, TX, USA 1Philips Semiconductors, San Antonio, TX, USA 2PDF Solutions Inc., San Jose, CA, USA DOI: 10.1109/ICMTS.2002.1193190 HOVER FOR ABSTRACT | PDF Xplore | |
| Test structures for a MEMS SiOx/metal process M. Hill, C. O'Mahony, P. J. Hughes, B. Lane, A. Mathewson National Microelectronics Research Centre, Cork, Ireland DOI: 10.1109/ICMTS.2002.1193197 HOVER FOR ABSTRACT | PDF Xplore | |
| Extraction of the base and emitter resistances in bipolar transistors using an accurate base resistance model F. Ingvarson, M. Linder1, K. O. Jeppson Solid State Electronics Laboratory, Department of Microelectronics ED, Chalmers University of Technology, Gothenburg, Sweden 1Department of Electronics, Malardalens Hogskola, Vasteras, Sweden DOI: 10.1109/ICMTS.2002.1193174 HOVER FOR ABSTRACT | PDF Xplore | |
| A novel method to characterize the dielectric and interfacial properties of Ba/sub 0.5/Sr/sub 0.5/TiO3 (BST)/Si by microwave measurement Hang-Ting Lue, Tseung-Yuen Tseng, Guo-Wei Huang1 Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan 1National Nano Device Laboratories, Hsinchu, Taiwan DOI: 10.1109/ICMTS.2002.1193179 HOVER FOR ABSTRACT | PDF Xplore | |
| Influence of probing configuration and data set size for bipolar junction capacitance determination D. Macsweeney, K. G. McCarthy1, L. Floyd2, A. Mathewson2, P. Hurley2, J. A. Power3, S. C. Kelly3 Cypress Semiconductor Corporation, Cork, Ireland 1National Microelectronics Research Centre, University College Cork, Ireland 2Department of Electrical and Electronic Engineering, University College Cork, Ireland 3Analog Devices, Inc., Limerick, Ireland DOI: 10.1109/ICMTS.2002.1193184 HOVER FOR ABSTRACT | PDF Xplore | |
| Useful numerical techniques for compact modeling C. C. McAndrew Motorola, Inc., Tempe, AZ, USA DOI: 10.1109/ICMTS.2002.1193183 HOVER FOR ABSTRACT | PDF Xplore | |
| Extraction of the coupling coefficients for the top-floating-gate (TFG) flash EEPROM cell D. McCarthy, M. O'Shea, R. Duane, K. Mccarthy1, A. Concannon2, A. Mathewson National Microelectronics Research Centre, Cork, Ireland 1Department of Electrical & Electronic Engineering, University College Cork, Ireland 2National Semiconductor Corporation, Santa Clara, CA, USA DOI: 10.1109/ICMTS.2002.1193186 HOVER FOR ABSTRACT | PDF Xplore | |
| A combined RG/CF large-signal extraction methodology to improve CMOS SPICE-parameter precision S. Mecking, A. Korbel, E. Paparisto1, U. Langmann Ruhr-Universität Bochum, Elektronische Bauelemente, Bochum, Germany 1Infineon Technologies AG Germany, Bochum, Germany DOI: 10.1109/ICMTS.2002.1193181 HOVER FOR ABSTRACT | PDF Xplore | |
| Sensitive measurement method for evaluation of high thermal resistance in bipolar transistors N. Nenadovic, L. K. Nanver, H. Schellevis, D. de Mooij1, V. Zieren1, J. W. Slotboom Laboratory of ECTM, DIMES, Delft University of Technnology, Delft, Netherlands 1Philips Research Laboratories, Eindhoven, Netherlands DOI: 10.1109/ICMTS.2002.1193175 HOVER FOR ABSTRACT | PDF Xplore | |
| Compact model development for a new non-volatile memory cell architecture M. O'Shea, D. McCarthy, R. Duane, K. McCarthy1, A. Concannon2, A. Mathewson National Microelectronics Research Centre, Cork, Ireland 1Department of Electrical & Electronic Engineering, University College Cork, Ireland 2National Semiconductor Corporation, Santa Clara, CA, USA DOI: 10.1109/ICMTS.2002.1193188 HOVER FOR ABSTRACT | PDF Xplore | |
| A test structure for spectrum analysis of hot-carrier-induced photoemission from subquarter-micron CMOSFETs S. Odanaka, K. Yamashita, N. Koike1, K. Tatsuuma2 Department of Electronics and Informatics, Toyama Prefectural University, Toyama, Japan 1Cybermedia Center, Osaka University, Osaka, Japan 2ULSI Process Technology Development Center, Matsushita Electric Ind. Co., Ltd., Kyoto, Japan DOI: 10.1109/ICMTS.2002.1193178 HOVER FOR ABSTRACT | PDF Xplore | |
| CV doping profiling of boron out-diffusion using an abrupt and highly doped arsenic buried epilayer C. J. Ortiz, L. K. Nanver, W. D. van Noort, T. L. M. Scholtes, J. W. Slotboom Laboratory of ECTM, DIMES, Delft University of Technnology, Delft, Netherlands DOI: 10.1109/ICMTS.2002.1193176 HOVER FOR ABSTRACT | PDF Xplore | |
| Low current application dedicated process characterization method W. Rahajandraibe, C. Dufaza, D. Auvergne, B. Cialdella1, B. Majoux1, V. Chowdhury1 LIRMM UMR C5506 CNRS, Université de Montpellier II, Montpellier, France 1STMicroelectronics, Grenoble, France DOI: 10.1109/ICMTS.2002.1193168 HOVER FOR ABSTRACT | PDF Xplore | |
| Wafer-level characterization of EEPROM tunnel oxide using a fast floating-gate technique and a realistic memory cell-based test structure S. Renard, P. Boivin, J. L. Autran1 STMicroelectronics, Zone Industrielle de Rousset, Rousset, France 1L2MP, UMR CNRS 6137, Université Ax-Marseille 1, Bâtiment IRPHE, Marseilles, France DOI: 10.1109/ICMTS.2002.1193187 HOVER FOR ABSTRACT | PDF Xplore | |
| A test structure for the design of thermal flow sensors N. Sabate, I. Gracia, J. Santander, C. Cane CSIC, Centre National de Microelectronica, Bellaterra, Spain DOI: 10.1109/ICMTS.2002.1193180 HOVER FOR ABSTRACT | PDF Xplore | |
| Test structure for precise statistical characteristics measurement of MOSFETs Y. Shimizu, M. Nakamura, T. Matsuoka, K. Taniguchi Department of Electronics and Information Systems, Osaka University, Suita, Osaka, Japan DOI: 10.1109/ICMTS.2002.1193170 HOVER FOR ABSTRACT | PDF Xplore | |
| Metallization proximity studies for copper spiral inductors on silicon C. B. Sia, K. S. Yeo1, Shao-Fu Chu, Z. Zeng, T. H. Lee Chartered Semiconductor Manufacturing Private Limited, Singapore 1School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore DOI: 10.1109/ICMTS.2002.1193165 HOVER FOR ABSTRACT | PDF Xplore | |
| Methodology for defect impact studies under conditions of low electrical testing coverage A. Skumanich, E. Ryabova Applied Materials, Santa Clara, CA, USA DOI: 10.1109/ICMTS.2002.1193193 HOVER FOR ABSTRACT | PDF Xplore | |
| Electrical CD characterisation of binary and alternating aperture phase shifting masks S. Smith, M. McCallum1, A. J. Walton, J. T. M. Stevenson Department of Electronics and Electrical Engineering, Scottish Mieroelectronics Centre, University of Edinburgh, Edinburgh, UK 1Xikon Court, Nikon Precision Europe, Livingston, UK DOI: 10.1109/ICMTS.2002.1193162 HOVER FOR ABSTRACT | PDF Xplore | |
| Test structures for the electrical characterisation of platinum deposited by focused ion beam S. Smith, A. J. Walton, S. Bond, A. W. S. Ross, J. T. M. Stevenson, A. M. Gundlach Department of Electronics and Electrical Engineering, Scottish Microelectronics Centre, University of Edinburgh, Edinburgh, UK DOI: 10.1109/ICMTS.2002.1193189 HOVER FOR ABSTRACT | PDF Xplore | |
| BSIM4.1 DC parameter extraction on 50 nm n-pMOSFETs D. Souil, G. Guegan, G. Bertrand, O. Faynot, S. Deleonibs1, G. Ghibaudo2 CEA-LETI, Laboratoire d'Electronique et des Technologies de l'Information, Grenoble Cedex 9, France 1NA 2Institut de Microélectronique, d'Electromagnétisme et de Photonique (IMEP), Grenoble Cedex 1, France DOI: 10.1109/ICMTS.2002.1193182 HOVER FOR ABSTRACT | PDF Xplore | |
| Strategies and test structures for improving isolation between circuit blocks D. Szmyd, L. Gambus1, A. Wilbanks2 Philips Semiconductors, Hopewell Junction, NY, United States 1Philips Semiconductors, Caen, France 2Philips Semiconductors, Albuquerque, NM, United States DOI: 10.1109/ICMTS.2002.1193177 HOVER FOR ABSTRACT | PDF Xplore | |
| Novel charge pumping method without using MOS transistor for SOI wafer inspection T. Takami, H. Yoshida, T. Uchihashi, S. Kishino Department of Electronics, Himeji Institute of Technology, Himeji, Japan DOI: 10.1109/ICMTS.2002.1193194 HOVER FOR ABSTRACT | PDF Xplore | |
| A test circuit for measuring standard deviations of MOSFET channel conductance and threshold voltage K. Terada, M. Sumida Faculty of Information Sciences, Hiroshima City University, Asaminami, Hiroshima, Japan DOI: 10.1109/ICMTS.2002.1193172 HOVER FOR ABSTRACT | PDF Xplore | |
 | Design and characterisation of a high precision resistor ladder test structure H. P. Tuinhout, G. Hoogzaad1, M. Vertregt, R. L. J. Roovers, C. Erdmann2 Prof. Holstlaan 4 (WAY41), Philips Research, Eindhoven, Netherlands 1Philips Semiconductors, Delft, Netherlands 2Philips Semiconductors, Caen, France DOI: 10.1109/ICMTS.2002.1193200 HOVER FOR ABSTRACT | PDF Xplore |
| A robust and production worthy addressable array architecture for deep sub-micron MOSFET's matching characterization S. B. Yeo, J. Bordelon1, S. Chu2, M. F. Li, B. A. Tranchina3, M. Harward1, L. H. Chan2, A. See2 The National University of Singapore, Singapore 1Telcordia Technologies, Inc., USA 2Chartered Semiconductor Mfg. Ltd, Singapore 3TestChip Technologies, Inc DOI: 10.1109/ICMTS.2002.1193201 HOVER FOR ABSTRACT | PDF Xplore |
