Photo by Brad SMITH

IEEE International Conference on Microelectronic Test Structures

ICMTS 2023 Tutorials

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March 27

08:00 Registration  
08:50 Welcome  
09:00 Hans Tuinhout  Challenges and solutions for characterization of semiconductor device matching and variability
09:55 Break  
10:00 Hitoshi Wakabayashi  Advanced CMOS Technologies including 3D-Stacked 2D-FETs
10:55 Break  
11:00 Masataka Higashiwaki  Current status of gallium oxide material and device technologies
11:55 Lunch  
13:25 Brad Smith  Test Structures: The Intersection of Design and Test
14:20 Break  
14:25 Masashi Bando  Recent progress in CMOS image sensor technology and future prospect
15:20 Break  
15:25 Noboru Shibata  History of 2D/3D Multi-Level Flash Memory Design Technology
16:20 Break  
16:25 Hiroshi Toshiyoshi  Design and test for MEMS vibrational energy harvesters
17:20 Break  
17:50 Welcome Reception  

Challenges and solutions for characterization of semiconductor device matching and variability

Hans Tuinout, NXP Semiconductors

Abstract

This tutorial will discuss techniques for characterization of small parametric differences of semiconductor components for high-precision analog electronic circuit design. After an introduction on the required orders of magnitude for modeling and characterization, way to look at measurement accuracy and short-term repeatability capabilities of semiconductor test equipment will be discussed. Then, the possibilities and limitations of statistics will be briefly touched upon, after which the focus will be on the tradeoff of measurement time vs. repeatability for high precision parametric device measurement for characterization of matching.


Advanced CMOS Technologies including 3D-Stacked 2D-FETs

Hitoshi Wakabayashi

Abstract


Current status of gallium oxide material and device technologies

Masataka Higashiwaki, Department of Physics and Electronics, Osaka Metropolitan University National Institute of Information and Communications Technology

Abstract

Gallium oxide (Ga2O3) has excellent material properties especially for power device applications that are represented by the extremely large bandgap of 4.5 eV and the high breakdown field over 7 MV/cm. It is also attractive from an industrial viewpoint since large-size, high-quality wafers can be manufactured from single-crystal bulks synthesized by melt-growth methods. These two features have drawn much attention to Ga2O3 as a new ultrawide bandgap semiconductor following SiC and GaN. In this talk, after a brief introduction of the material properties, state-of-the-art Ga2O3 material and device technologies will be discussed, including (1) bulk melt growth, (2) thin-film epitaxial growth, (3) FETs, and (4) Schottky barrier diodes.


Test Structures: The Intersection of Design and Test

Brad Smith, NXP Semiconductors

Abstract

This talk will cover the basics of test structure design and test, emphasizing how the two are inter-related. Often, there are no “right” answers in test structure design, only trade-offs. Methods for how to make those decisions will be covered, the most important of which is letting the desired output of a test structure define its design and testing.


Recent progress in CMOS image sensor technology and future prospect

Masashi Bando, Sony Semiconductor Solutions Corporation

Abstract

This presentation will begin with a brief introduction on the history of CMOS image sensor from device-structure perspective and expansion of application fields in the market. The presentation will include issues and imaging technologies associated with accelerated pixel scaling especially in mobile application, as well as global shutter and dynamic range expansion technology required for industry, security, and automotive application. Explanation will also be given for depth sensing, event-based vision sensing, and the concept for intelligent vision sensor as examples for “beyond 2D imaging” technology.


History of 2D/3D Multi-Level Flash Memory Design Technology

Noboru Shibata, KIOXIA Holdings Corporation

Abstract Currently, Multi-Level-Cell Flash Memory is used in a wide range of applications as a high-capacity, low-cost memory and has become indispensable in modern life. The first prototype of the Multi-Level-Cell NAND Flash Memory only stored 128 Mbit with 2 bits per cell. Since commercialization in 2001, the Multi-Level-Cell NAND Flash memory has increased by over 10,000 times to 1.33 Tbit memory density with 4 bits per cell (QLC). This tutorial will go over the challenges faced in shrinking down the size of memory cells and stacking multi-layers in 3D, how these obstacles were overcome to ensure reliability, and achieve higher capacity and faster memory. The transition and development of multi-level cell circuit design technology, cell characteristics and reliability will also be introduced.


Design and test for MEMS vibrational energy harvesters

Hiroshi Toshiyoshi, Institute of Industrial Science, The University of Tokyo

Abstract A vibrational energy harvester is developed using MEMS (microelectromechanical systems) technology to generate more than 1 mW of power from ambient vibrations with sub-gravity levels of acceleration at frequencies around 100 Hz. Electrets or permanent charges are formed on the surface of micro electrodes that generate electrostatically induced current from mechanical vibrations. In this tutorial lecture, we look into an analytical model of power generation using an equivalent circuit model, and discuss a methodology for using electret potential to tune the electromechanical conversion efficiency to maximize output power. We also discuss an automated method to experimentally determine the electret potential.


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