IEEE International Conference on Microelectronic Test Structures
ICMTS 2025 Program
Table of Contents
Session 1: Applications | ||||
| 1.1 | Power switch improvement for RO array characterization in 18nm FD-SOI technology platform validation C. Cagli, F. Pourchon, H. Degoirat, J. B. Moulard, F. Granoux, M. Dahmani, R. Wilson STMicroelectronics, 850 Rue Jean Monnet, Crolles, France | 3 | ||
| 1.2 | Comparative Study of Switching Dynamics in Ferroelectric-based Capacitors with Different Design Options Francesco Driussi, Enrico Rocco, Marco Massarotto, Suzanne Lancaster1 DPIA, Università degli Studi di Udine, Italy 1NaMLab gGmbH, Dresden, Germany 2Chair of Nanoelectronics, IHM, TU–Dresden, Germany | 7 | ||
| 1.3 | Enhancement of Synaptic Properties using Ta2O5/ZnO/Ta2O5 Tri-layer Device Chae-Min Yeom, Sung-Ho Kim, Yu-Bin Kim, Dong-Min Kim, Kil-Sun Roh1, Young-Su Kim1, Yong-Goo Kim2, Hyuk-Min Kwon3, Hi- Deok Lee Department of Electronics Engineering, Chungnam National University, Daejeon, Korea 1LAB of Nano Process Technology, National Nanofab Center, Daejeon, Korea 2Department of Green Semiconductor System, Korea Polytechnic, Daegu, Korea 3School of Electronic & Electrical Engineering, Hankyong National University, Anseong, Korea | 12 | ||
Session 2: Reliability | ||||
| 2.1 | The Hot Carrier Injection Induced Degradation in MOS Transistors with Subthreshold Hump and the Corelated Impacts on Low Frequence Noise for Low Power Analog Designs Wuxia Li, Kejun Xia1, Rayne Xu2, Lie Chao2 NXP Semiconductors, Tianjin AIoT Lab 1TSMC, Power Management Business Development 2NXP Semiconductors, Front End Innovation | 19 | ||
| 2.2 | On-Wafer Characterization of HCI/BTI-induced Threshold Voltage Degradation based Measured Frequency Shift of Ring-Oscillator Circuits Chika Tanaka, Nobuyuki Momo, Fumie Fujii, Osamu Kobayashi Memory Division, Kioxia Corporation, Yokohama, Japan | 24 | ||
| 2.3 | SiC DMOSFET Real Wafer Level HTRB and HTGB Evaluation Ng Hong Seng, Tan Ai Heong1, Beh Shun Xiar1, Lee Johhny2, Lin Jai Wei1 X-FAB Sarawak, Kuching, Malaysia 1Nexustest, Singapore 2X-FAB Texas, Lubbock, TX, USA | 29 | ||
| 2.4 | Novel Fractal Points Implementation for Electron Beam Inspection (EBI) and Data Analysis Po Jen Mo, Tsan Yu Ho1, Tomoya Asano1, Xing Ji2 Micron Technology, Taichiung City, Taiwan, R.O.C. 1Micron Technology, Higashi Hiroshima-shi,Japan 2Micron Technology, Singapore, Singapore | 33 | ||
Session 3: Device Characterization | ||||
| 3.2 | D-Mode GaN/AlGaN/GaN MOS-HEMT Test Structures for Evaluating Gate Dielectric Impact on Device Performance Andres S. Aguirre-Sanchez, Rajni Aggarwal, Chadwin D. Young, Rodolfo A. Rodriguez-Davila, Jonathan Anderson1, Edwin L. Piner1, Manuel A. Quevedo Materials Science & Engineering, University of Texas at Dallas, Richardson, TX, USA 1Materials Application Research Center Texas State University, San Marcos, TX, USA | 43 | ||
| 3.3 | TACHI: Tests as a Chip Identifier Ryosuke Sada, Ryo Shirai, Michihiro Shintani1, Takashi Sato Kyoto University, Kyoto, Japan 1Kyoto Institute of Technology, Kyoto, Japan | 47 | ||
| 3.4 | Reducing Short-Circuit current of CMOS Inverter circuits with “PN-Body Tied SOI-FET” Kazuki Nakahashi, Takayuki Mori, Jiro Ida Kanazawa Institute of Technology, Nonoichi, Japan | 53 | ||
Session 4: Design & Layout | ||||
| 4.1 | Layout experiments and test structures to characterize Local Layout Effects due to mechanical stress in FinFET transistors Angelo Rossoni, Tomasz Brozek1, Sharad Saxena2, Rajesh Khamankar2, Christopher Hess1, Jurcy Huang3, Yuchen Teng3, Zsolt Kovacs-Vajna4, Michele Quarantelli PDF Solutions, Inc., Brescia, Italy 1PDF Solutions, Inc., Santa Clara, CA, USA 2PDF Solutions, Inc., Dallas, TX, USA 3PDF Solutions, Inc., Hsinchu, Taiwan 4Dept. of Information Engineering, University of Brescia, Brescia, Italy | 59 | ||
| 4.2 | Estimating Verticality Parameters in Deep Reactive Ion Etching using MEMS Oscillators Shun Yasunaga, Yoshio Mita The University of Tokyo, Tokyo, Japan | 63 | ||
| 4.3 | Non-uniformities in MOSFET-array characteristics caused by probe-induced mechanical stress Pablo Sarazá-Canflanca, Xue Fan1, Simon Van Beek, Erik Bury, Ben Kaczer imec, Leuven, Belgium 1Chengdu Technological University, Sichuan, China | 68 | ||
| 4.4 | Methodology and Test Structures for Studying β-Ga2O3 Dielectric and Contact Interfaces A. A. Gruszecki, J. Roy, K. S. Agrawal1, P. La Torraca1, K. Cherkaoui1, P. K. Hurley1, R. M. Wallace, C. D. Young Department of Materials Science and Engineering, The University of Texas at Dallas, Richardson, TX, USA 1Tyndall National Institute, University College Cork, Cork, Ireland | 74 | ||
Session 5: RF & Power | ||||
| 5.1 | A new test structure for charge pumping current measurement in vertical Si power device Tatsuya Ohguro, Kohei Oasa, Takuya Yasutake, Takuma Hara, Tatsuya Nishiwaki, Kenya Kobayashi, Hiroaki Kato Advanced Semiconductor Device Development Center, Toshiba Electronic Devices & Storage Corporation | 83 | ||
| 5.2 | A Novel Separated Source Electrodes Kelvin (SSEK) Structure for Extracting Channel Mobility in the 4H-SiC VDMOSFET Wen-Shu Chen, An-Ching Li, Chia-Lung Hung1, Yi-Kai Hsiao1, Bing-Yue Tsui Institute of Electronics, National Yang Ming Chiao Tung University, Hsinchu, Taiwan, R.O.C. 1Semiconductor Research Center, Hon Hai Research Institute, Hsinchu, Taiwan, R.O.C. | 87 | ||
| 5.3 | Modified Angelov Model with Improved Accuracy for RF GaN-on-Si HEMTs David C. Chen, Min Li Chou, Kerwin Lin, Mike Hsieh, Perry Lin, Heng Ching Lin, Kevin Lee, Alex Hou, Barry Lin, M. C. Lai Wavetek Microelectronics Corporation (WTK), HsinChu, Taiwan | 91 | ||
| 5.4 | Passive and Causal Modeling of 300-GHz-Band IC Capacitors Using Rational Polynomial Approximation Shun Beppu, Yuto Hirayama, Shinsuke Hara1, Akifumi Kasamatsu1, Yoshio Mita2, Kyoya Tkano Department of Electrical Engineering, Tokyo University of Science, Chiba, Japan 1National Institute of Information and Communications Technology, Tokyo, Japan 2Department of Electrical Engineering, Tokyo University of Science, Tokyo, Japan | 95 | ||
Session 6: Cryogenic Measurements | ||||
| 6.1 | Oscillation in Cryogenic DC Measurements of High Power LDMOS Devices and Solution Yili Wang, Kejun Xia1, Guofu Niu, Michael Hamilton, Xu Cheng2 Alabama Micro/Nanoelectronics Science and Technology Center, Auburn University, Auburn, AL, USA 1TSMC, Taiwan, R.O.C. 2NXP Semiconductors, Arizona, USA | 101 | ||
| 6.2 | Measurement of Subthreshold Current Variability at 1.5 K Using Addressable MOSFET Array Tomoko Mizutani, Kiyoshi Takeuchi, Takuya Saraya, Hiroshi Oka1, Takahiro Mori1, Masaharu Kobayashi2, Toshiro Hiramoro Institute of Industrial Science, The University of Tokyo, Tokyo, Japan 1National Institute of Advanced Industrial Science and Technology (AIST), Ibaraki, Japan 2Systems Design Lab (d.lab), The University of Tokyo, Tokyo, Japan | 106 | ||
| 6.3 | Hysteresis-Induced Neuromorphic Behavior in 180nm Bulk PMOS Devices at 3K Fiheon Imroze, Bhavani Yalagala, Meraj Ahmad, Mostafa Elsayed, Robert Graham, Giuseppe Colletta, Hadi Heidari, Martin Weides James Watt School of Engineering, University of Glasgow, Glasgow, United Kingdom | 111 | ||
Session 7: Process Characterization | ||||
| 7.1 | A Test Structure for Analyzing Self-Heating Induced Distortion in On-Chip Current Sensing Resistors Heng Ma, Shoubhik Karmakar, Huajun Zhang, Yuyan Liu, Haidong Guo1, Marco Berkhout2, Qinwen Fan Delft University of Technology, Delft, The Netherlands 1ams OSRAM, Plano, TX, USA 2Monolithic Power Systems, Enschede, The Netherlands | 119 | ||
| 7.2 | Novel Test Structures for 3D NAND Array Plasma Damage Monitoring Keerti Kalia, Roberta Rita Bottini1, Ken Marr, Allen Mcteer, Cheah Zhin Mow2, James Davis Micron Technology, Inc., Boise, ID, USA 1Micron Technology, Inc., Vimercate, Italy 2Micron Technology, Inc., Singapore | 124 | ||
| 7.3 | Advantage and Challenge of Electrical Critical Dimension Test Structures for Electroplated High Aspect Ratio Nano Structures (HARNS) on Insulating Materials Yoshio Mita, Ayako Mizushima, Noriko Kawai1, Tsuboi Shinji1, Yurie Inoue1, Etsuko Ohta1, Shun Yasunaga, Ryosho Nakane1, David Bourrier2, Amel Beghersa2, Hugues Granier2, Akio Higo1 Department of Electrical Engineering and Information Systems, the University of Tokyo, Tokyo, Japan 1Systems Design Lab (d.lab), School of Engineering, the University of Tokyo, Tokyo, Japan 2LAAS-CNRS, Toulouse, France | 129 | ||
| 7.4 | Fabrication of NbO2 based IMT Selector Devices via 300mm Based Memory Test Vehicle Karsten Beckmann, Martin Rodgers, Theodore Wallach1, Ross Paries1, Nathaniel Cady1 NY CREATES, Albany, NY, USA 1College of Nanotechnology, Science, and Engineering, University at Albany, Albany, NY, USA | 133 | ||
Session 8: Test Optimization | ||||
| 8.1 | Smart Diagnostics for 3D CFET: A Machine Learning Approach to Failure Analysis Jerome Mitard, Husnu Murat Kocak1, Thomas Chiarella, Cassie Sheng2, Steven Demuyck2, Naoto Horiguchi2 Compute Technology Device Department, IMEC, Belgium 1Imec & Department of Computer Science, KU Leuven, Belgium 2Process Integration Department, IMEC, Belgium | 143 | ||
| 8.2 | Automatic PSP MOSFET model card extraction powered by deep learning Alba Ordonez Rodriguez, Fabien Gilibert, Francois Paolini, Alan Gerard;Elouan Vincent, Nicolas Derrier, Matthieu Quoirin, Pascal Urard, John Samuel, Remy Cellier1, Lioua Labrak1, Nacer Abouchi STMicroelectronics, Crolles, France 1CPE Lyon - LIRIS CNRS UMR 5205, University of Lyon, Lyon, France | 147 | ||
| 8.3 | Active Sampling of Electrical Characterization Parameters for Efficient Measurement Husnu Murat Kocak, Jerome Mitard1, Ahmet Teoman Naskali2, Jesse Davis Department of Computer Science, KU Leuven, Belgium 1Compute Technology Device Department, IMEC, Belgium 2Department of Computer Engineering, Galatasaray University, Turkey | 151 | ||
| 8.4 | Test Accuracy Improvement of Ensemble Gaussian Process-based IC Outlier Detection Using Temporal Similarity among Wafers Daisuke Goeda, Tomoki Nakamura1, Masuo Kajiyama1, Makoto Eiki1, Hajime Takayama, Takashi Sato2, Michihiro Shintani Graduate School of Science and Technology, Kyoto Institute of Technology, Kyoto, Japan 1Sony Semiconductor Manufacturing Corporation, Isahaya-shi, Japan 2Graduate School of Informatics, Kyoto University, Kyoto, Japan | 157 | ||
| 8.5 | Evaluation of Rapid Vt testing of Wafer-Level MOSFETs. Michael H. Herman, Ben Morris Parametric Test Group, Advantest America, San Jose, CA, USA | 163 | ||
Session 9: MEMS & Sensors | ||||
| 9.1 | Microheater integration in gate dielectric functionalized IGZO thin film transistors for methanol sensing M. Calderon-Gonzalez, M.L. Tietze1, S. Mondal, E. Georgitzikis, D. Cheyns1, R. Ameloot2, J. Genoe imec, Leuven, Belgium 1Department of Microbial and Molecular Systems (M2S), KU Leuven, Belgium 2Department of Electrical Engineering (ESAT) KU Leuven, Belgium | 173 | ||
| 9.2 | Enhanced Permittivity in PEALD Al2O3/TiO2 Nanolaminates: Investigating Maxwell-Wagner and Interfacial Polarization in IDEs Z. Mousavi Karimi, J. A. Davis Department of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA | 179 | ||
| 9.3 | Planar FDSOI Reconfigurable Schottky Barrier FETs for Gas Sensing Andreas Kramer, Tillmann Krauss, Maximilian Reuter, Julian Kulenkampff, Dominic Korner, Klaus Hofmann Integrated Electronic Systems Lab, Technical University of Darmstadt, Darmstadt, Germany | 183 | ||