IEEE International Conference on Microelectronic Test Structures
ICMTS 1988 Program
By First Author
| Sources Of Error In Extracting The Specific Contact Resistance From Kelvin Device Measurements W. J. C. Alexander, A. J. Walton Edinburgh Microfabrication Facility Department of Electrical Engineering, Edinburgh University, Edinburgh, UK DOI: 10.1109/ICMTS.1988.672922 HOVER FOR ABSTRACT | PDF Xplore | |
| A Direct Method For Measuring The Gate Oxide Capwi-hnces Of MOSFETS R. A. Allen, C. A. Pina, M. G. Buehler Jet Propulsion Laboratory, California Institute of Technology, Pasadena, CA, USA DOI: 10.1109/ICMTS.1988.672927 HOVER FOR ABSTRACT | PDF Xplore | |
| CMOS Process Monitor M. G. Buehler, L. W. Linholm1, V. C. Tyree2, R. A. Allen3, B. R. Blaes, G. A. Jennings, K. A. Hicks Jet Propulsion Laboratory, California Institute of Technology, Pasadena, CA, USA 1National Bureau of Standards, WA, USA 2Information Sciences Institute, University of Southern California, CA, USA 3NA DOI: 10.1109/ICMTS.1988.672954 HOVER FOR ABSTRACT | PDF Xplore | |
| Comparison Of Results From Simple Expressions For MOSFET Parameter Extraction M. G. Buemer, Y. -S. Lin1 California Institute Of Technology 1Jet Propulsion Laboratory, California Institute of Technology, Pasadena, CA, USA DOI: 10.1109/ICMTS.1988.672941 HOVER FOR ABSTRACT | PDF Xplore | |
| Method For Accurate Determinaton Of The Intrinsic Cut-off Frequency of IC Bipolar Transistors D. Celi Thomson Semiconductors, Saint Egreve, France DOI: 10.1109/ICMTS.1988.672961 HOVER FOR ABSTRACT | PDF Xplore | |
| Measurement Of Static Noise Immunity For STL And ISL Bipolar Logics J. M. Chateau, M. Depey Thomson Semiconductors, Grenoble, France DOI: 10.1109/ICMTS.1988.672960 HOVER FOR ABSTRACT | PDF Xplore | |
| Spatially Non-uniform, Time Varying Thermal Characterization Of VlSI Chips B. J. Cooke, J. L. Prince, Z. J. Staszak, D. Shope, W. J. Fahey Department of Electrical and Computer Engineering, Electronic Packaging Laboratory, University of Arizona Tucson, Tucson, AZ, USA DOI: 10.1109/ICMTS.1988.672950 HOVER FOR ABSTRACT | PDF Xplore | |
| An Electrical Test Structure For Measuring Contact Size G. Freeman, W. Lukaszek Center For Integrated Systems, University of Stanford, USA DOI: 10.1109/ICMTS.1988.672920 HOVER FOR ABSTRACT | PDF Xplore | |
| The Design And Calibration Of A Semiconductor Strain Gauge Array S.A. Gee, V. R. Akylas, W. F. van den Bogert Philips Research Laboratories Sunnyvale, Signetics Corporation, Sunnyvale, CA, USA DOI: 10.1109/ICMTS.1988.672958 HOVER FOR ABSTRACT | PDF Xplore | |
| Automatic test structure modification K. Golshan, S. S. M. Shetti, M. Howard1 Semiconductor Process and Design Center VLSI Design Laboratory, Texas Instruments, Inc., Dallas, TX, USA 1NA DOI: 10.1109/ICMTS.1988.672959 HOVER FOR ABSTRACT | PDF Xplore | |
| A Test Structure To Measure The misalignment between Poly-si And Diffusion layers Mi Jian Electronic Engineering Department, Tianjin University, TJU, Tianjin, China DOI: 10.1109/ICMTS.1988.672962 HOVER FOR ABSTRACT | PDF Xplore | |
| Statistical Significance Of Defect density Estimates U. Kaempf Circuit Technology Group, Hewlett Packard Company, Palo Alto, CA, USA DOI: 10.1109/ICMTS.1988.672944 HOVER FOR ABSTRACT | PDF Xplore | |
| A Microelectronic Test Structure For Thickness Determination Of Homogeneous Conducting Thin Films In VLSI Processing J. S. Kim, L. W. Linholm, B. L. Barley, M. H. Hanes1, M. W. Cresswell1 National Bureau of Standards, Gaithersburg, MD, USA 1Westinghouse Research and Development Center, Pittsburgh, PA, USA DOI: 10.1109/ICMTS.1988.672925 HOVER FOR ABSTRACT | PDF Xplore | |
| Interconnect capacitance characterization for mos-ic process and circuit design C. Kortekaas Device and Process Characterization Group, Philips Research Laboratories, Eindhoven, Netherlands DOI: 10.1109/ICMTS.1988.672926 HOVER FOR ABSTRACT | PDF Xplore | |
| Experiences In Extraction Of Contact Parameters From Process Evaluation Test-structures U. Lieneweg Jet Propulsion Laboratory, California Institute of Technology, Pasadena, CA, USA DOI: 10.1109/ICMTS.1988.672921 HOVER FOR ABSTRACT | PDF Xplore | |
| A developmental expert system for test structure ata evaluation L. W. Linholm, D. Khera1, C. P. Reeve2, M. W. Cresswell3 National Bureau of Standards, Gaithersburg, MD, USA 1Electrical Engineering Department, University of Maryland, College Park, MD, USA 2Gaithersburg, MD, USA 3Westinghouse Research and Development Center, Pittsburgh, PA, USA DOI: 10.1109/ICMTS.1988.672953 HOVER FOR ABSTRACT | PDF Xplore | |
| Expert System For Test Structure Data Interpretation F. N. H. Montijn-Dorgelo, H. J. ter Horst Device and Process Characterisation Group and Computer Science Group, Philips Research Laboratories, Eindhoven, Netherlands DOI: 10.1109/ICMTS.1988.672955 HOVER FOR ABSTRACT | PDF Xplore | |
| Total Dose Radiation Respnse Of Test Structures And VLSI Lcqic Devices: An Analytical And Experimental Correlation D. M. Newberry, B. E. Peters Control Data Corporation, Bloomington, MN, USA DOI: 10.1109/ICMTS.1988.672930 HOVER FOR ABSTRACT | PDF Xplore | |
| Defect Diagnostic Matrix -a Defect Learning Vehicle For Submicron Technologies R. E. Newhart, E. J. Sprogis General Technology Division, IBM, Essex Junction, VT, USA DOI: 10.1109/ICMTS.1988.672943 HOVER FOR ABSTRACT | PDF Xplore | |
| Test Vehicle For The Measurement Of Charge Collection And Soft Error rate Prediction In high-density Memories due to alpha-particle strikes P. Oldiges, T. Furuyama1, J. Frey2 Department of Electrical Engineering, Cornell University, Ithaca, NY, USA 1Semiconductor Device Engineering Laboratory, Toshiba Corporation, Kawasaki, Japan 2Department of Electrical Engineering, University of Maryland, College Park, MD, USA DOI: 10.1109/ICMTS.1988.672951 HOVER FOR ABSTRACT | PDF Xplore | |
| Guidelines For Latch-up Characterization Techniques W. Reczek, W. Pribyl Components Group, Siemens AG, Munich, Germany DOI: 10.1109/ICMTS.1988.672946 HOVER FOR ABSTRACT | PDF Xplore | |
| Comb/serpentine/cross-bridge Test Structure For Fabrication Process Evaluation H. R. Sayah, M. G. Buehler Jet Propulsion Laboratory, California Institute of Technology, Pasadena, CA, USA DOI: 10.1109/ICMTS.1988.672923 HOVER FOR ABSTRACT | PDF Xplore | |
| Thermal Interactions Between Electromigration Test Structures H. A. Schafft, J. Albers Semiconductor Electronics Division, National Bureau of Standards, Gaithersburg, MD, USA DOI: 10.1109/ICMTS.1988.672948 HOVER FOR ABSTRACT | PDF Xplore | |
| A Novel Device Structure For Studying Gate And Channel Edge Effects In IGFET's J. A. Serack, A. J. Walton, J. M. Robertson Edinburgh Microfabrication Facility, University of Edinburgh, Edinburgh, UK DOI: 10.1109/ICMTS.1988.672931 HOVER FOR ABSTRACT | PDF Xplore | |
| Determination Of Process-dependent Critical SPICE Parameters For Application-specific ICs B. J. Sheu, Chung-Ping Wan, Chih-Ching Shih, Wen-Jay Hsu, M. C. Hsu Department of Electrical Engineering and Information Sciences Institute, University of Southern California, Los Angeles, CA, USA DOI: 10.1109/ICMTS.1988.672932 HOVER FOR ABSTRACT | PDF Xplore | |
| An Objective Method Of Assessing Metal Patterning Quality J. T. M. Stevenson, J. Gow, J. Serack Edinburgh Microfabrication Facility, University of Edinburgh, Edinburgh, UK DOI: 10.1109/ICMTS.1988.672924 HOVER FOR ABSTRACT | PDF Xplore | |
| Test Circuit Structures For Characterizing The Effects Of Localized Hot-carrier-induced Charge In VLSI Switching Circuits J. S. Suehle, K. F. Galloway1 Electrical Engineering Department, University of Maryland, College Park, MD, USA 1Electrical and Computer Engineering Department, University of Arizona Tucson, Tucson, AZ, USA DOI: 10.1109/ICMTS.1988.672947 HOVER FOR ABSTRACT | PDF Xplore | |
| MOS-IC Process And Device Characterization Within Philips S. Swaving, A. Ketting, A. Trip1 Device and Process Characterization Group, Philips Research Laboratories, Eindhoven, Netherlands 1Eindhoven, Netherlands DOI: 10.1109/ICMTS.1988.672957 HOVER FOR ABSTRACT | PDF Xplore | |
| Impact Of The Self-heating Effect On Circuit Performance Estimation Using DC Model Parameters D. Takace, J. Trager1, D. Schmitt-Landsiedel1 Siemens Ag 1Corporate Research and Development, Siemens AG, Munich, Germany DOI: 10.1109/ICMTS.1988.672928 HOVER FOR ABSTRACT | PDF Xplore | |
| A Fully Analytical MOSFET Model Parameter Extraction Approach H. P. Tuinhout, S. Swaving, J. J. M. Joosten Device and Process Characterization Group, Philips Research Laboratories, Eindhoven, Netherlands DOI: 10.1109/ICMTS.1988.672933 HOVER FOR ABSTRACT | PDF Xplore | |
| Determination Of The HF Model Parameters Of The MOS Transistor By Using Standard Dropin Test Structures P. Vandeloo, W. Sansen1 Elektrotechniek, KU Leuven, Leuven, Belgium 1IMEC, Leuven, Belgium DOI: 10.1109/ICMTS.1988.672942 HOVER FOR ABSTRACT | PDF Xplore | |
| Interpretation of capacitance-voltage curves for process fault diagnosis: a machine-learning expert system approach J. A. Walls, A. J. Walton, J. M. Robertson, T. M. Crawford Edinburgh Microfabrication Facility Department of Electrical Engineering, University of Edinburgh, UK DOI: 10.1109/ICMTS.1988.672956 HOVER FOR ABSTRACT | PDF Xplore | |
| Standard Defect Monitor C. Weber Silicon Process Laboratory, Hewlett Packard Corporation, Palo Alto, CA, USA DOI: 10.1109/ICMTS.1988.672945 HOVER FOR ABSTRACT | PDF Xplore | |
| Delta-L Extraction Using Parasitic Bipolar Transistors D. Wilson, A. J. Walton, J. M. Robertson, R. J. Holwill Edinburgh Microfabrication Facility, University of Edinburgh, Edinburgh, UK DOI: 10.1109/ICMTS.1988.672940 HOVER FOR ABSTRACT | PDF Xplore | |
| Evaluating Integrated Circuit Technologles For Space Application - The GVSC Test Chip K. T. Wilson, T. C. Zietlow1, T. C. Morse, T. K. Tsubota, J. G. Rollins, R. R. Herndon2 Aerospace Corporation, El Segundo, CA, USA 1NA 2Air Force Space Technology Center, Kirtland Air Force Base, Albuquerque, NM DOI: 10.1109/ICMTS.1988.672952 HOVER FOR ABSTRACT | PDF Xplore | |
| Ring Oscillator Structure For realistic Dynamic Stress Of MOSFETS And Interconnects J. Winnerl, F. Neppl, A. Lill, G. Roska, W. Zatisch1 Corporate Research and Development, Microelectronics, Siemens AG, Munich, Germany 1NA DOI: 10.1109/ICMTS.1988.672929 HOVER FOR ABSTRACT | PDF Xplore | |
| Temperature Control In Wafer-level Testing Of Large Multi-segment Electromigration Test Structures N. Zamani, Yu-sang Lin Jet Propulsion Laboratory, California Institute of Technology, Pasadena, CA, USA DOI: 10.1109/ICMTS.1988.672949 HOVER FOR ABSTRACT | PDF Xplore |
